• Title/Summary/Keyword: Low Power and Shutdown

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DEVELOPMENT OF AN INTEGRATED RISK ASSESSMENT FRAMEWORK FOR INTERNAL/EXTERNAL EVENTS AND ALL POWER MODES

  • Yang, Joon-Eon
    • Nuclear Engineering and Technology
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    • v.44 no.5
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    • pp.459-470
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    • 2012
  • From the PSA point of view, the Fukushima accident of Japan in 2011 reveals some issues to be re-considered and/or improved in the PSA such as the limited scope of the PSA, site risk, etc. KAERI (Korea Atomic Energy Research Institute) has performed researches on the development of an integrated risk assessment framework related to some issues arisen after the Fukushima accident. This framework can cover the internal PSA model and external PSA models (fire, flooding, and seismic PSA models) in the full power and the low power-shutdown modes. This framework also integrates level 1, 2 and 3 PSA to quantify the risk of nuclear facilities more efficiently and consistently. We expect that this framework will be helpful to resolve the issue regarding the limited scope of PSA and to reduce some inconsistencies that might exist between (1) the internal and external PSA, and (2) full power mode PSA and low power-shutdown PSA models. In addition, KAERI is starting researches related to the extreme external events, the risk assessment of spent fuel pool, and the site risk. These emerging issues will be incorporated into the integrated risk assessment framework. In this paper the integrated risk assessment framework and the research activities on the emerging issues are outlined.

Vital Area Identification for the Physical Protection of Nuclear Power Plants during Low Power and Shutdown Operation (원자력발전소 정지저출력 운전 기간의 물리적방호를 위한 핵심구역파악)

  • Kwak, Myung Woong;Jung, Woo Sik;Lee, Jeong-ho;Baek, Min
    • Journal of the Korean Society of Safety
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    • v.35 no.1
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    • pp.107-115
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    • 2020
  • This paper introduces the first vital area identification (VAI) process for the physical protection of nuclear power plants (NPPs) during low power and shutdown (LPSD) operation. This LPSD VAI is based on the 3rd generation VAI method which very efficiently utilizes probabilistic safety assessment (PSA) event trees (ETs). This LPSD VAI process was implemented to the virtual NPP during LPSD operation in this study. Korea Atomic Energy Research Institute (KAERI) had developed the 2nd generation full power VAI method that utilizes whole internal and external (fire and flooding) PSA results of NPPs during full power operation. In order to minimize the huge burden of the 2nd generation full power VAI method, the 3rd generation full power VAI method was developed, which utilizes ETs and minimal PSA fault trees instead of using the whole PSA fault tree. In the 3rd generation full power VAI method, (1) PSA ETs are analyzed, (2) minimal mitigation systems for avoiding core damage are selected from ETs by calculating system-level target sets and prevention sets, (3) relatively small sabotage fault tree that has the systems in the shortest system-level prevention set is composed, (4) room-level target sets and prevention sets are calculated from this small sabotage fault tree, and (5) the rooms in the shortest prevention set are defined as vital areas that should be protected. Currently, the 3rd generation full power VAI method is being employed for the VAI of Korean NPPs. This study is the first development and application of the 3rd generation VAI method to the LPSD VAI of NPP. For the LPSD VAI, (1) many LPSD ETs are classified into a few representative LPSD ETs based on the functional similarity of accident scenarios, (2) a few representative LPSD ETs are simplified with some VAI rules, and then (3) the 3rd generation VAI is performed as mentioned in the previous paragraph. It is well known that the shortest room-level prevention sets that are calculated by the 2nd and 3rd generation VAI methods are identical.

A Study on the Improved Load Sharing rate in Paralleled Operated Lead Acid Battery by Using Microprocessor (마이크로 프로세서를 이용한 축전지의 병렬 운전 부하분담률 개선에 관한 연구)

  • 이정민
    • Proceedings of the KIPE Conference
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    • 2000.07a
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    • pp.493-497
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    • 2000
  • A battery is the device that transforms the chemical energy into the direct-current electrical energy without a mechanical process. Unit cells are connected in series to obtain the required voltage while being connected in parallel to organize capacity for load current. Because the voltage drop down in one set of battery is faster than in two one it may result in the low efficiency of power converter with the voltage drop and cause the system shutdown. However when the system being shutdown. However when the system being driven in parallel a circular-current can be generated,. It is shown that as a result the new batteries are heated by over-charge and over-discharge and the over charge current increases rust of the positive grid and consequently shortens the lifetime of the new batteries. The difference between the new batteries and old ones is the amount of internal resistance. In this paper we can detect the unbalance current using the microprocessor and achieve the balance current by adjusting resistance of each set, The internal resistance of each set becomes constant and the current of charge and discharge comes to be balanced by inserting the external resistance into the system and calculating the change of internal resistance.

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Fully Digital Controlled Power Supply for PLS (전 디지털제어 전원장치)

  • Ha, Ki-Man;Kim, Y.S.;Lee, S.K.
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2005.06a
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    • pp.1011-1015
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    • 2005
  • Fully digital controlled 20-bit magnet power supplies have been developed and successfully tested for closed orbit correction of PLS(Pohang Light Source). The new digital power supply has used fiber optics for 25kHz switching of IGBT drivers, and implemented DSP, ADC, Interlock, DCCT cards in a compact 3U-sized 19" chassis. Input/Output low-pass filters suppress harmonics of 60Hz line frequency and switching frequency noise effectively. Overall performance of the power supplies have been demonstrated as +/- 2ppm short-term stability(<1 min), and +/- 10ppm long-term stability(<36 hours). All the existing 12-bit 70 power supplies for vertical correction magnets will be replaced with new digital power supplies during 2005 summer shutdown period. In this paper, we will describe the hardware structure and control method of the digital power supply and the experimental results will be shown.

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Implementation of DYLAM-3 to Core Uncovery Frequency Estimation in Mid-Loop Operation

  • Kim, Dohyoung;Chang hyun Chung;Moosung Jae
    • Nuclear Engineering and Technology
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    • v.30 no.6
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    • pp.531-540
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    • 1998
  • The DYLAM-3 code which overcomes the limitation of event tree/fault tree was applied to LOOP (Loss of Off-site Power) in the mid-loop operation employing HEPs (Human Error Probabilities) supplied by the ASEP (Accident Sequence Evaluation Program) and the SEPLOT (Systematic Evaluation Procedure for Low power/shutdown Operation Task) procedure in this study. Thus the time history of core uncovery frequency during the mid-loop operation was obtained. The sensitivity calculations in the operator's actions to prevent core uncovery under LOOP in the mid-loop operation were carried out. The analysis using the time dependent HEP was performed on the primary feed & bleed which has the most significant effect on core uncovery frequency. As the result, the increment of frequency is shown after 200 minutes duration of simulation conditions. This signifies the possibility of increment in risk after 200 minutes. The primary feed & bleed showed the greatest impact on core uncovery frequency and the recovery of the SCS (Shutdown Cooling System) showed the least impact. Therefore the efforts should be taken on the primary feed & bleed to reduce the core uncovery frequency in the mid-loop operation. And the capability of DYLAM-3 in applying to the time dependent concerns could be demonstrated.

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Development of an Accident Sequence Precursor Methodology and its Application to Significant Accident Precursors

  • Jang, Seunghyun;Park, Sunghyun;Jae, Moosung
    • Nuclear Engineering and Technology
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    • v.49 no.2
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    • pp.313-326
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    • 2017
  • The systematic management of plant risk is crucial for enhancing the safety of nuclear power plants and for designing new nuclear power plants. Accident sequence precursor (ASP) analysis may be able to provide risk significance of operational experience by using probabilistic risk assessment to evaluate an operational event quantitatively in terms of its impact on core damage. In this study, an ASP methodology for two operation mode, full power and low power/shutdown operation, has been developed and applied to significant accident precursors that may occur during the operation of nuclear power plants. Two operational events, loss of feedwater and steam generator tube rupture, are identified as ASPs. Therefore, the ASP methodology developed in this study may contribute to identifying plant risk significance as well as to enhancing the safety of nuclear power plants by applying this methodology systematically.

Low-Power $32bit\times32bit$ Multiplier Design for Deep Submicron Technologies beyond 130nm (130nm 이하의 초미세 공정을 위한 저전력 32비트$\times$32비트 곱셈기 설계)

  • Jang Yong-Ju;Lee Seong-Soo
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.6 s.348
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    • pp.47-52
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    • 2006
  • This paper proposes a novel low-power $32bit\times32bit$ multiplier for deep submicron technologies beyond 130nm. As technology becomes small, static power due to leakage current significantly increases, and it becomes comparable to dynamic power. Recently, shutdown method based on MTCMOS is widely used to reduce both dynamic and static power. However, it suffers from severe power line noise when restoring whole large-size functional block. Therefore, the proposed multiplier mitigates this noise by shutting down and waking up sequentially along with pipeline stage. Fabricated chip measurement results in $0.35{\mu}m$ technology and gate-transition-level simulation results in 130nm and 90nm technologies show that it consumes $66{\mu}W,\;13{\mu}W,\;and\;6{\mu}W$ in idle mode, respectively, and it reduces power consumption to $0.04%\sim0.08%$ of active mode. As technology becomes small, power reduction efficiency degrades in the conventional clock gating scheme, but the proposed multiplier does not.

Analysis of Power Consumption Patterns for Commercial Portable Multimedia Players (상용 휴대형 멀티미디어 재생기 전력소모 패턴 분석)

  • Nam, Young-Jin;Yang, Eun-Ju;Lee, Jong-Yuol;Kim, Seong-Ryul;Seo, Dae-Wha
    • Journal of Korea Society of Industrial Information Systems
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    • v.12 no.3
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    • pp.95-103
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    • 2007
  • Portable multimedia Player (PMP) devices have been gaining in its popularity with the emerging digital convergence of data, video, audio, etc. Since the PMP devices are typically equipped with DSP, a bigger LCD screen, and a hard disk, efficient power management has become more crucial than the other portable devices. This paper builds up a hardware/software-based power measurement system based on data acquisition devices. Subsequently, it measures and analyzes the power consumed in commercial PMP devices under different types of events: the system boot & shutdown, video playback, and the use of different video-coding types. Finally, our analysis of the measured power consumption patterns reveals useful information for the design of low-power PMP devices.

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