• Title/Summary/Keyword: Loop Vectorization

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Performance Improvement of Cumulus Parameterization Code by Unicon Optimization Scheme (Unicon Optimization 기법을 이용한 적운모수화 코드 성능 향상)

  • Lee, Chang-Hyun;kim, Min-gyu;Shin, Dae-Yeong;Cho, Ye-Rin;Yeom, Gi-Hun;Chung, Sung-Wook
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.15 no.2
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    • pp.124-133
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    • 2022
  • With the development of hardware technology and the advancement of numerical model methods, more precise weather forecasts can be carried out. In this paper, we propose a Unicon Optimization scheme combining Loop Vectorization, Dependency Vectorization, and Code Modernization to optimize and increase Maintainability the Unicon source contained in SCAM, a simplified version of CESM, and present an overall SCAM structure. This paper tested the unicorn optimization scheme in the SCAM structure, and compared to the existing source code, the loop vectorization resulted in a performance improvement of 3.086% and the dependency vectorization of 0.4572%. And in the case of Unicorn Optimization, which applied all of these, the performance improvement was 3.457% compared to the existing source code. This proves that the Unicorn Optimization technique proposed in this paper provides excellent performance.

The vectorization and recognition of circuit symbols for electronic circuit drawing management (전자회로 도면관리를 위한 벡터화와 회로 기호의 인식)

  • 백영묵;석종원;진성일;황찬식
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.33B no.3
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    • pp.176-185
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    • 1996
  • Transformin the huge size of drawings into a suitable format for CAD system and recognizng the contents of drawings are the major concerans in the automated analysis of engineering drawings. This paper proposes some methods for text/graphics separation, symbol extraction, vectorization and symbol recognition with the object of applying them to electronic cirucit drawings. We use MBR (Minimum bounding rectangle) and size of isolated region on the drawings for separating text and graphic regions. Characteristics parameters such as the number of pixels, the length of circular constant and the degree of round shape are used for extracting loop symbols and geometric structures for non-loop symbols. To recognize symbols, nearest netighbor between FD (foruier descriptor) of extractd symbols and these of classification reference symbols is used. Experimental results show that the proposed method can generate compact vector representation of extracted symbols and perform the scale change and rotation of extracted symbol using symbol vectorization. Also we achieve an efficient searching of circuit drawings.

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The Accuracy of the Non-continuous I Test for One-Dimensional Arrays with References Created by Induction Variables

  • Zhang, Qing
    • Journal of Information Processing Systems
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    • v.10 no.4
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    • pp.523-542
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    • 2014
  • One-dimensional arrays with subscripts formed by induction variables in real programs appear quite frequently. For most famous data dependence testing methods, checking if integer-valued solutions exist for one-dimensional arrays with references created by induction variable is very difficult. The I test, which is a refined combination of the GCD and Banerjee tests, is an efficient and precise data dependence testing technique to compute if integer-valued solutions exist for one-dimensional arrays with constant bounds and single increments. In this paper, the non-continuous I test, which is an extension of the I test, is proposed to figure out whether there are integer-valued solutions for one-dimensional arrays with constant bounds and non-sing ularincrements or not. Experiments with the benchmarks that have been cited from Livermore and Vector Loop, reveal that there are definitive results for 67 pairs of one-dimensional arrays that were tested.

Generation of OC and MMA topology optimizer by using accelerating design variables

  • Lee, Dongkyu;Nguyen, Hong Chan;Shin, Soomi
    • Structural Engineering and Mechanics
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    • v.55 no.5
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    • pp.901-911
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    • 2015
  • The goal of this study is to investigate computational convergence of optimal solutions, with respect to optimality criteria (OC) method and methods of moving asymptotes (MMA) as optimization model for non-linear programming of material topology optimization using an acceleration method that makes design variables rapidly move toward almost 0 and 1 values. 99 line topology optimization MATLAB code uses loop vectorization and memory pre-allocation as properly exploiting the strengths of MATLAB and moves portions of code out of the optimization loop so that they are only executed once as restructuring the program. Numerical examples of a simple beam under a lateral load and a given material density limitation provide merits and demerits of the present OC and MMA for 99 line topology optimization code of continuous material topology optimization design.

A Vectorization Technique at Object Code Level (목적 코드 레벨에서의 벡터화 기법)

  • Lee, Dong-Ho;Kim, Ki-Chang
    • The Transactions of the Korea Information Processing Society
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    • v.5 no.5
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    • pp.1172-1184
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    • 1998
  • ILP(Instruction Level Parallelism) processors use code reordering algorithms to expose parallelism in a given sequential program. When applied to a loop, this algorithm produces a software-pipelined loop. In a software-pipelined loop, each iteration contains a sequence of parallel instructions that are composed of data-independent instructions collected across from several iterations. For vector loops, however the software pipelining technique can not expose the maximum parallelism because it schedules the program based only on data-dependencies. This paper proposes to schedule differently for vector loops. We develop an algorithm to detect vector loops at object code level and suggest a new vector scheduling algorithm for them. Our vector scheduling improves the performance because it can schedule not only based on data-dependencies but on loop structure or iteration conditions at the object code level. We compare the resulting schedules with those by software-pipelining techniques in the aspect of performance.

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Recognition of dimension lines based on extraction of the objet in mechanical drawings (기계 도면에서 객체의 분리 추출에 기반한 치수선의 인식)

  • 정영수;박길흠
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.34S no.10
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    • pp.120-131
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    • 1997
  • This paper prsents a new method that automatically recognizes the dimension lines (consisting of shape lines, tail lines and extension lines) from the mechanical drawings. In the proposed method, the object and closed-loop symbols are separated from the character-free drawings. Then the object lines and interpretation lines are vectorized by using several techniques such as thinning, line-vectorization, and vector-clustering. Finally, after recognizing arrowheads by using pattern matching, we recognize dimension lines from interpretation lines by using arrohead's directional vector and centroid. By using the methods of geometric modeling and mathematical operation, the proposed method readility recognizes the dimension lines from complex drawings. Experimental resuls are presented, which are obtained by applying the proposed method to drawings drawn in compliance with the KS drafting standard.

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Fast Generation of Digital Hologram Based on Multi-GPU (Multi-GPU 기반의 고속 디지털 홀로그램 생성)

  • Song, Joong-Seok;Park, Jung-Sik;Seo, Young-Ho;Park, Jong-Il
    • Journal of Broadcast Engineering
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    • v.16 no.6
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    • pp.1009-1017
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    • 2011
  • Fast generation of digital hologram is of importance for real-time holography broadcasting. In this paper, we propose such a method that parallelizes the Computer-Generated Holography (CGH) algorithm for digital hologram generation and make it faster using Multi Graphic Processing Unit (Multi-GPU) with help of the Compute Unified Device Architecture (CUDA) and the Open Multi-Processing (OpenMP). In addition, we propose optimization methods such as fixation variable, vectorization, and loop unrolling for making the CGH algorithm much faster. Experimental results show that our method is about 9,700 times faster than a CPU-based one.