• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.5
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• pp.551-558
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• 2012

This paper presents a dual band loop-type ground antenna using lumped-elements that control the impedance bandwidth and resonant frequency. The dual-band operation of the proposed antenna is realized by inserting an additional resonated loop feed structure into the reference ground antenna. As the proper value of the capacitor and the inductor are chosen, the impedance bandwidth of our antenna with voltage standing wave ratio(VSWR) equal to 3 is 85 MHz and 725 MHz at the 2.45 and 5.5 GHz frequency band, respectively. Its validity is demonstrated via both the computed and measured results. Good antenna patterns and efficiencies are achieved at the dual frequency bands, as well as the physically small antenna element size($10{\times}5mm^2$).

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.11A
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• pp.912-920
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• 2003

This paper is about the design of a small wide-band slot loop antenna, which consists of dual offset-fed and rectangular loop within the slot on a substrate. The proposed antenna is a novel structure generating a multi-resonances due to three geometrical resonance structures. The impedance matching of this antenna can be accomplished by changing the offset position of dual-fed at resonance frequencies. In this experiment, the slot of a fabricated antenna has a center frequency of 6.755㎓, 12.5mm${\times}$50mm in size and the rectangular loop has 10.5mm${\times}$27.5mm in size. The measured result is fractional bandwidth 63.21% with VSWR 2:1, which is agreed with the simulated result within 5% of error, and the maximum antenna gain is 7.42㏈i.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.8
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• pp.47-52
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• 2010

In this paper, a phase-locked loop with a self-noise suppressing voltage controlled oscillator to improve a phase noise characteristic has been proposed. The magnitude of the proposed transfer function is maximum 25dB lower than that of a conventional transfer function around a bandwidth. The proposed PLL has been designed based on a 1.8V $0.18{\mu}m$ CMOS process and proved by HSPICE simulation.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.23 no.4
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• pp.356-364
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• 2013

This paper presents a tracking gain-up controller design method to control effectively the vibration of tracking actuator caused by external shocks and remaining velocity after seek control. A pole placement constraint is considered to assure a desired transient response against the vibration of tracking actuator. A loop gain-up constraint is introduced to hold the tracking gain-up loop gain and control bandwidth within allowable bounds. The pole placement constraint is expressed by a matrix inequality and the loop gain-up constraint is considered as an objective function so that genetic algorithm can be applied. Finally, a tracking gain-up controller is obtained by integrating a genetic algorithm with LMI design approach. The proposed tracking gain-up controller design method is applied to the track-following system of a DVD recording device and its effectiveness is evaluated through the experimental results.

• Journal of Power Electronics
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• v.18 no.5
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• pp.1523-1535
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• 2018

High-performance Phase-Locked Loops (PLLs) are critical for grid synchronization in grid-tied power electronic applications. In this paper, a new single-phase All Digital Phase-Locked Loop (ADPLL) is proposed. It features fast transient response and good robustness under distorted grid conditions. It is designed for Field Programmable Gate Array (FPGA) implementation. As a result, a high sampling frequency of 1MHz can be obtained. In addition, a new OSG is adopted to track the power frequency, improve the harmonic rejection and remove the dc offset. Unlike previous methods, it avoids extra feedback loop, which results in an enlarged system bandwidth, enhanced stability and improved dynamic performance. In this case, a new parameter optimization method with consideration of loop delay is employed to achieve a fast dynamic response and guarantee accuracy. The Phase Detector (PD) and Voltage Controlled Oscillator (VCO) are realized by a Coordinate Rotation Digital Computer (CORDIC) algorithm and a Direct Digital Synthesis (DDS) block, respectively. The whole PLL system is finally produced on a FPGA. A theoretical analysis and experiments under various distorted grid conditions, including voltage sag, phase jump, frequency step, harmonics distortion, dc offset and combined disturbances, are also presented to verify the fast dynamic response and good robustness of the ADPLL.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.10
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• pp.63-68
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• 2014

This paper deals with a methodology that applies the time-varying magnetic fields produced by the cloud discharges to find the direction of thunderstorm movement. We investigated the basic performance of the magnetic field measurement system composed of multi-turn loop-type sensors, the differential amplifier and active integrator. As a result, the response characteristics of the magnetic field sensor system to sinusoidal signals was excellent. The frequency bandwidth ranges from about 1 kHz to 500 kHz, the response sensitivity was 0.16mV/nT. In addition, we proposed the algorithm that determines the direction of lightning discharges using the comparison of the output signals of right-angled loop-type magnetic field sensors. The accuracy of the direction finding of lightning discharges is fairly well within the measurement error of less than $5^{\circ}$. The magnetic field measurement system proposed in this work can be used to track the direction of thunderstorm movement.

• ETRI Journal
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• v.34 no.1
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• pp.1-8
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• 2012

This paper proposes a reconfigurable beam-steering antenna using a bended dipole and a loop. The radiation patterns of the two antennas are cancelled or compensated, and headed towards a specific direction when the dipole and loop antenna are combined at a reasonable ratio. The proposed antenna can steer the beam directions by controlling the operation of two artificial switches. The proposed antenna was manufactured on a PCB (FR-4) and a flexible PCB (polyimide). In the case of the antenna that was fabricated on a PCB, the maximum beam directions were $+50^{\circ}$, $0^{\circ}$, and $-50^{\circ}$ in the azimuth direction using the two artificial switches, and the antenna gain was 1.96 dBi to 2.48 dBi in the operation bandwidth of 2.47 GHz to 2.53 GHz. Also, the antenna was fabricated on a flexible PCB and measured under various bending conditions for wearable applications.

• Journal of IKEEE
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• v.17 no.4
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• pp.484-491
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• 2013

In this paper, we proposed an internal multiband loop embedded monopole antenna for mobile handset that could be used for smart phones. The proposed antenna has a volume of 40 mm(W) ${\times}$ 15 mm(L) ${\times}$ 5 mm(H), ground plane size is 40 mm(W) ${\times}$ 80 mm(L), and covers the GSM900 (Global System for Mobile communications : 880-960 MHz), K-PCS (Korea-Personal Communications Service : 1750-1870 MHz), US-PCS (US Personal Communications Service : 1850-1990 MHz), WCDMA (Wideband Code Division Multiple Access : 1920-2170 MHz), Wibro (2300-2390 MHz), Bluetooth (2400-2483 MHz) and WLAN (Wireless Local Area Network : 2400-2483.5 MHz) bands for VSWR (voltage standing wave ration) less than 3. The proposed loop adding design at middle section of longest branch showed wide impedance bandwidth for the lowest resonance frequency band. The proposed antenna have a lowest resonance frequency band from 738 MHz to 1075 MHz for S11 value of -6dB. A HFSS (High Frequency Structure Simulator) of the Ansys Corporation based on a finite element method is employed to analyze the proposed antenna in the design process and to compare the simulation and experimental results.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.25 no.5
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• pp.361-368
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• 2015

This paper deals with a robust fine seek controller design problem with multiple constraints using a genetic algorithm. A robust $H\infty$ constraint is introduced to attenuate effectively velocity disturbance caused by the eccentric rotation of the disk. A weighting function is optimally selected based on the estimation of velocity disturbance and the estimated minimum velocity loop gain. A robust velocity loop constraint is considered to minimize the variances of the velocity loop gain and bandwidth against the uncertainties of fine actuator. Finally, a robust fine seek controller is obtained by solving a genetic algorithm with an LMI condition and an appropriate objective function. The proposed controller design method is applied to the fine seek control system of a DVD recording device and is evaluated through the experimental results.

• Journal of Power Electronics
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• v.13 no.3
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• pp.447-457
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• 2013

For grid-connected LCL-filtered inverters, resonance yields instability and low bandwidth. As a result, careful designs are required. This paper presents a systematic current control structure, where pole assignment consisting of one or more feedbacks is the inner loop, and the outer loop is the direct grid current control. Several other issues are discussed, such as the inner-loop feedback choices, pole-assignment algorithms, robustness and harmonic rejection. Generally, this kind of strategy has three different types according to the inner-loop feedback choices. Among them, a novel pole-assignment algorithm has been proposed, where the inner control maintains four freely-assigned poles which are just two pairs of conjugated poles located at the fundamental and resonance frequencies separately. It has been found that with the different types, the steady-state and dynamic performances are quite different. Finally, simulations and experiments have been provided to verify the control and design of the proposed methods.