• Title/Summary/Keyword: Look Ahead Algorithm

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Development of an Improved Geometric Path Tracking Algorithm with Real Time Image Processing Methods (실시간 이미지 처리 방법을 이용한 개선된 차선 인식 경로 추종 알고리즘 개발)

  • Seo, Eunbin;Lee, Seunggi;Yeo, Hoyeong;Shin, Gwanjun;Choi, Gyeungho;Lim, Yongseob
    • Journal of Auto-vehicle Safety Association
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    • v.13 no.2
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    • pp.35-41
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    • 2021
  • In this study, improved path tracking control algorithm based on pure pursuit algorithm is newly proposed by using improved lane detection algorithm through real time post-processing with interpolation methodology. Since the original pure pursuit works well only at speeds below 20 km/h, the look-ahead distance is implemented as a sigmoid function to work well at an average speed of 45 km/h to improve tracking performance. In addition, a smoothing filter was added to reduce the steering angle vibration of the original algorithm, and the stability of the steering angle was improved. The post-processing algorithm presented has implemented more robust lane recognition system using real-time pre/post processing method with deep learning and estimated interpolation. Real time processing is more cost-effective than the method using lots of computing resources and building abundant datasets for improving the performance of deep learning networks. Therefore, this paper also presents improved lane detection performance by using the final results with naive computer vision codes and pre/post processing. Firstly, the pre-processing was newly designed for real-time processing and robust recognition performance of augmentation. Secondly, the post-processing was designed to detect lanes by receiving the segmentation results based on the estimated interpolation in consideration of the properties of the continuous lanes. Consequently, experimental results by utilizing driving guidance line information from processing parts show that the improved lane detection algorithm is effective to minimize the lateral offset error in the diverse maneuvering roads.

Development of an ergonomic control panel layout system and its application

  • 박성준;정의승;이상도;이동춘
    • Proceedings of the ESK Conference
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    • 1995.10a
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    • pp.172-181
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    • 1995
  • A control panel layout system was developed to generate an ergrnomically sound panel design. A constraint satisfaction concept was introduced as a framework of incorporating diverse ergonomic design guidelines into the panel layout. An efficient search algorithm which can find a constraint satisfaction solution within a reasonable time was developed based on preprocess and look ahead procedures with the backjumping technique. The proto- type panel layaout system was developed on a SPARC workstation. The constraint satisfaction algorithm was programmed in C language with Motif as a GUI tool under the X-windows environment. The effectiveness of the prototype paned layout system was examined by a case study.

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High Speed Modular Multiplication Algorithm for RSA Cryptosystem (RSA 암호 시스템을 위한 고속 모듈라 곱셈 알고리즘)

  • 조군식;조준동
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.3C
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    • pp.256-262
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    • 2002
  • This paper presents a novel radix-4 modular multiplication algorithm based on the sign estimation technique (3). The sign estimation technique detects the sign of a number represented in the form of a carry-sum pair. It can be implemented with 5-bit carry look-ahead adder. The hardware speed of the cryptosystem is dependent on the performance modular multiplication of large numbers. Our algorithm requires only (n/2+3) clock cycle for n bit modulus in performing modular multiplication. Our algorithm out-performs existing algorithm in terms of required clock cycles by a half, It is efficient for modular exponentiation with large modulus used in RSA cryptosystem. Also, we use high-speed adder (7) instead of CPA (Carry Propagation Adder) for modular multiplication hardware performance in fecal stage of CSA (Carry Save Adder) output. We apply RL (Right-and-Left) binary method for modular exponentiation because the number of clock cycles required to complete the modular exponentiation takes n cycles. Thus, One 1024-bit RSA operation can be done after n(n/2+3) clock cycles.

Low-noise VLSI Implementation of Pipelined IIR Filters (파이프라인된 IIR 필터의 저잡음 VLSI구현)

  • 태기철;최정필;신승철;정진균
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.4B
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    • pp.788-795
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    • 2000
  • Scattered look-ahead pipelining method can be efficiently used for high sample rate or low-power applications of digital recursive filters. Although the pipelined filters are guaranteed to be stable by this method, these filters suffer from large round off noise when the poles are crowed within some critical regions. To avoid this problem, a low-noise implementation technique was proposed using constrained Remez exchange algorithm. By the constrained filter design approach, the desired filter spectrum is satisfied while some of the pole angles are constrained to avoid pole crowding within critical regions. In the proposed approach, to obtain improved spectrum characteristics or better round off noise properties, the radius of the angle-constrained pole is optimized depending on the direction of the pole movement.

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An In-depth Analysis and Performance Improvement of a Container Relocation Algorithm

  • Lee, Hyung-Bong;Kwon, Ki-Hyeon
    • Journal of the Korea Society of Computer and Information
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    • v.22 no.9
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    • pp.81-89
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    • 2017
  • The CRP(Container Relocation Problem) algorithms pursuing efficient container relocation of wharf container terminal can not be deterministic because of the large number of layout cases. Therefore, the CRP algorithms should adopt trial and error intuition and experimental heuristic techniques. And because the heuristic can not be best for all individual cases, it is necessary to find metrics which show excellent on average. In this study, we analyze GLAH(Greedy Look-ahead Heuristic) algorithm which is one of the recent researches in detail, and propose a heuristic metrics HOB(sum of the height differences between a badly placed container and the containers prohibited by the badly placed container) to improve the algorithm. The experimental results show that the improved algorithm, GLAH', exerts a stable performance increment of up to 3.8% in our test data, and as the layout size grows, the performance increment gap increases.

Convergence Analysis and Design of Adaptive Filter for Noise Cancel over High Speed Communication System (고속통신에서의 잡음제거용 적응필터의 수렴성능 분석 및 설계)

  • 조삼호;권승탁;서광석
    • Proceedings of the IEEK Conference
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    • 1999.11a
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    • pp.63-66
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    • 1999
  • Echo and near-end crosstalk(NEXT) can be generated in two-wire duplex transmission. In this paper investigates how to cancel echoes of high speed communication. A pipeline algorithm is used to remove the echoes that high speed communication. It is least mean squared(LMS) algorithm based on the relaxed look-ahead concept, is focused on the pipelined LMS, and its performance is compared to that of the serial LMS algorithm. And we design pipelined adaptive filtering. In advanced of the hardware implementation with VHDL code the performance of pipelined LMS algorithm is verified by the computer simulation.

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An Improved Genetic Algorithm to Minimize Makespan in Flowshop with Availability Constraints (기계 가용성 제약을 고려한 흐름공정 상황하에서 Makespan을 최소화하기 위한 향상된 유전 알고리듬)

  • Lee, Kyung-Hwa;Jeong, In-Jae
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.30 no.1
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    • pp.115-121
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    • 2007
  • In this paper, we study flowshop scheduling problems with availability constraints. In such problems, n jobs have to be scheduled on m machines sequentially under assumption that the machines are unavailable during some periods of planning horizon. The objective of the problem is to find a non-permutation schedule which minimizes the makespan. As a solution procedure, we propose an improved genetic algorithm which utilizes a look-ahead schedule generator to find good solutions in a reasonable time Computational experiments show that the proposed genetic algorithm outperforms the existing genetic algorithm.

A Efficient Architecture of MBA-based Parallel MAC for High-Speed Digital Signal Processing (고속 디지털 신호처리를 위한 MBA기반 병렬 MAC의 효율적인 구조)

  • 서영호;김동욱
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.7
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    • pp.53-61
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    • 2004
  • In this paper, we proposed a new architecture of MAC(Multiplier-Accumulator) to operate high-speed multiplication-accumulation. We used the MBA(Modified radix-4 Booth Algorithm) which is based on the 1's complement number system, and CSA(Carry Save Adder) for addition of the partial products. During the addition of the partial product, the signed numbers with the 1's complement type after Booth encoding are converted in the 2's complement signed number in the CSA tree. Since 2-bit CLA(Carry Look-ahead Adder) was used in adding the lower bits of the partial product, the input bit width of the final adder and whole delay of the critical path were reduced. The proposed MAC was applied into the DWT(Discrete Wavelet Transform) filtering operation for JPEG2000, and it showed the possibility for the practical application. Finally we identified the improved performance according to the comparison with the previous architecture in the aspect of hardware resource and delay.

A Study of Function and Analysis of ALU for Graph-based Boolean Functions (그래프 기법을 이용한 부울함수의 ALU 기능 해석에 관한 연구)

  • Woo, Kwang-Bang;Kim, Hyun-Ki;Bahk, In-Gyoo
    • Proceedings of the KIEE Conference
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    • 1987.07a
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    • pp.226-229
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    • 1987
  • This paper was aimed to, using a new data structure, develop a set of algorithms to execute the output function of Digital System. These functions were represented as directed, acyclic graphs. by applying many restrictions on vertices on graph, the efficient manipulation of boolean function was accomplished. The results were as follows; 1. A canonical representation of a boolean function was created by the reduction algorithm. 2. The operation of two functions was accomplished using t he apply algorithm, according to the binary operator. 3. The arguments having 1 as the value nf function were enumerated using the satisfy algorithm. 4. Composing TTL 74181 4-bit ALU and 74182 look-ahead carry generator, the ALU having 4-bit and 16-bit as word size was implemented.

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An efficient space-leaping method using double leaping (이중 도약을 이용한 효율적인 공간 도약법)

  • 이정진;신병석;신영길
    • Journal of KIISE:Computer Systems and Theory
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    • v.30 no.3_4
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    • pp.109-116
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    • 2003
  • Space leaping is one of accelerated image-order volume rendering. This method accelerates rendering speed by finding and leaping the empty space. Although its rendering speed is very fast, it takes long pre-processing time to make the data structure to leap the space. In this paper we propose the look-ahead sampling algorithm to double the leaping distance comparing with previous approaches. This algorithm reduces the preprocessing time to make the distance map without significant changes of rendering time. Also, it accelerates the rendering time.