• 제목/요약/키워드: Link speed

검색결과 701건 처리시간 0.027초

Design and Experiment Results of High-Speed Wireless Link Using Sub-terahertz Wave Generated by Photonics-Based Technology

  • Kim, Sungil;Ahn, Seung-Ho;Park, Seong Su
    • ETRI Journal
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    • 제35권4호
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    • pp.578-586
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    • 2013
  • Using a sub-terahertz (sub-THz) wave generated using a photonics-based technology, a high-speed wireless link operating at up to 10 Gbps is designed and demonstrated for realization of seamless connectivity between wireless and wired networks. The sub-THz region is focused upon because of the possibility to obtain sufficient bandwidth without interference with the allocated RF bands. To verify the high-speed wireless link, such dynamic characteristics as the eye diagrams and bit error rate (BER) are measured at up to 10 Gbps for non-return-to-zero pseudorandom binary sequence $2^{31}-1$ data. From the measurement results, a receiver sensitivity of -23.5 dBm at $BER=10^{-12}$ is observed without any error corrections when the link distance between the transmitter and receiver is 3 m. Consequently, we hope that our design and experiment results will be helpful in implementing a high-speed wireless link using a sub-THz wave.

4-PAM signaling을 이용한 high speed serial link transmitter (High Speed Serial Link Transmitter Using 4-PAM Signaling)

  • 정지경;이정준;범진욱;정영한
    • 대한전자공학회논문지SD
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    • 제46권11호
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    • pp.84-91
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    • 2009
  • 본 논문은 multi-level signaling을 이용한 high speed serial link transmitter에 관하여 제안하였다. High speed serial link에서 수 Gb/s를 달성하기 위해 4-pulse amplitude modulation (PAM) 을 사용하였다. 4-PAM은 4개의 level로 한 symbol time에 2 bit data를 전송함으로써 binary signaling보다 2배 빠른 data 전송이 가능해졌다. 제안된 4-PAM transmitter는 전압 output 대신 전류 output을 생성하며 이로 인해 driver의 switching time이 빨라져서 더 높은 속도의 transmitter를 구현할 수 있었다. $2^5-1$ pseudo-random bit sequence (PRBS) 생성기는 built-in self test (BIST)를 하기 위해 on-chip으로 설계되었다. 본 연구는 동부 하이텍 $0.18{\mu}m$ CMOS 공정을 통하여 설계되었으며 1.8 V supply voltage에서 eye 크기가 160 mV 이고 최대 동작 속도는 8 Gb/s이다. 칩 전체 면적은 $0.7\times0.6mm^2$이며 전력 소모는 98 mW이다.

유연한 링크를 가진 3자유도 로봇조작기 진동의 펴지제어 (Fuzzy Vibration Control of 3 DOF Robot Manipulator with Flexible Link)

  • 김재원;양현석;박영필
    • 대한기계학회논문집A
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    • 제20권12호
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    • pp.3883-3891
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    • 1996
  • Performance and productivity of robot manipulator can be improved by increasing its working speed and extending its link length. But heavy weght of the commercial robot links, considered as "rigid body", limits its mazimum working speed and the weght of the links can be reduced for high speed operation. But this light-weight link or long link for special use cannot be consideredas "rigid" structure and vibration of the link due to its flexibility causes errors in end-effector position and orientation. Thus the elastic behaviro of the flexible link should be taken care of for increasing work speed and getting smaller error of end-effector position. In this paper, the fuzzy control theory is selected to design the controller which controlos the joint positions of the robot manipulator and suppress the vibration of flexible link. In the forst place, for the 1 DOF flexible link system, the fuzzy control theory is implemented. The contdroller for the 1 DOF flexible link system is designed. Experimental research is carried out to examine the controllability and the validity of the fuzzy control theory based controller. Next, using the extended desing schemes for the case of the 1 DOF flexible link system and usign the experimental phenomena of the 3 DOF flexible link system, the fuzzy controller for the 3 DOF flexible link system is desinged and experimented.ed and experimented.

하이브리드 메모리 큐브 (HMC) 시스템의 고속 직렬 링크 (SerDes)를 위한 모델링 및 성능 분석 (Modeling and Analysis of High Speed Serial Links (SerDes) for Hybrid Memory Cube Systems)

  • 전동익;정기석
    • 대한임베디드공학회논문지
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    • 제12권4호
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    • pp.193-204
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    • 2017
  • Various 3D-stacked DRAMs have been proposed to overcome the memory wall problem. Hybrid Memory Cube (HMC) is a true 3D-stacked DRAM with stacked DRAM layers on top of a logic layer. The logic die is mainly used to implement a memory controller for HMC, and it is connected through a high speed serial link called SerDes with a host that is either a processor or another HMC. In HMC, the serial link is crucial for both performance and power consumption. Therefore, it is important that the link is configured properly so that the required performance should be satisfied while the power consumption is minimized. In this paper, we propose a HMC system model included the high speed serial link to estimate performance accurately. Since the link modeling strictly follows the link flow control mechanism defined in the HMC spec, the actual HMC performance can be estimated accurately with respect to each link configuration. Various simulations are conducted in order to deduce the correlation between the HMC performance and the link configuration with regard to memory utilization. It is confirmed that there is a strong correlation between the achievable maximum performance of HMC and the link configuration in terms of both bandwidth and latency. Therefore, it is possible to find the best link configuration when the required HMC performance is known in advance, and finding the best configuration will lead to significant power saving while the performance requirement is satisfied.

A New Fast P2P Video Transmission Method Applied in Asymmetrical Speed Channel Environment

  • Wang, Zhang;Zhang, Jixian;Li, Haitao;Liu, Jian
    • Journal of Communications and Networks
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    • 제12권3호
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    • pp.209-215
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    • 2010
  • In an asymmetrical speed channel environment like asymmetric digital subscriber line, the up-link bandwidth is normally smaller than the down-link bandwidth, which will lead to extremely low utilization of down-link bandwidth when current P2P video transmission is applied. To overcome this, a new fast P2P video transmission method applied in an asymmetrical speed channel environment is proposed in this paper. On the basis of the many-to-one concept, the proposed method uses a new multipeer aggregation technique to enhance the utilization of down-link bandwidth. In addition, an adaptive peer assignment algorithm is also introduced in order to minimize the overall transmission time. Experimental results show that by using our proposed method, the utilization of down-link bandwidth is significantly improved, and the overall transmission time is greatly reduced.

GPS 운행궤적정보를 이용한 표준링크기반 통행속도 산출 시스템 연구 (A Study on the Standard Link-based Travel Speed Calculation System Using GPS Tracking Information)

  • 송길종;황재선;임재중;정의용
    • 한국ITS학회 논문지
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    • 제18권5호
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    • pp.142-155
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    • 2019
  • 본 연구는 택시 GPS 프로브 정보를 수집하여 링크 결손 방지와 링크 진출 입 시각을 판단하여 표준링크기반의 통행속도 정확도를 향상시키기 위한 시스템 개발을 목적으로 진행되었다. 이를 위해 표준링크기반 맵매칭과 개별차량 통행속도를 산출하고 이를 이용해 서비스링크 평균 통행속도 산출을 위한 5단계 과정으로 구성된 프레임워크와 알고리즘을 제시하였다. 그리고 테헤란로와 학동로 두 곳의 현장 조사를 실시하여 본 논문에서 제시한 방법에 의한 결과를 검증하였다. 현장조사 전체시간 기준으로, 통행속도 편차는 0.2km/h와 0.6km/h, 정확도는 99%와 96%, 그리고 MAPE(Mean Absolute Percentage Error)는 1%와 4%로 나타났다. 결과적으로 표준링크를 사용하지 않는 기존 방법론보다 우수한 정확도를 보였다.

치과 핸드피스용 고속 PMSM의 정현파 구동을 위한 인버터 직류 링크전압 제어기법 (DC link voltage control method in the sinusoidal current drive system for dental hand-piece PMSM)

  • 전금상;박상욱;박재성;김상희;안희욱
    • 한국기계가공학회지
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    • 제12권4호
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    • pp.16-21
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    • 2013
  • This paper presents a DC link voltage control method to reduce the ripple current and the switching loss in the sinusoidal current drive system for the wide-speed range PMSM. The DC link voltage of the three phase inverter in the sinusoidal current drive system is designed by the back-EMF voltage at maximum speed of the PMSM. In general, the drive systems have used the constant DC link voltage without reference to the motor speed. The current ripple causes hysteresis loss and makes noise. In addition, the switching loss on the inverter increases in proportion to the rise in the DC link voltage. In this paper, we propose the variable DC link voltage control method to reduce the current ripple in the PMSM drive system. We show reduction effect of the current repple and the switching loss through simulation results.

4-레벨 인버터의 DC-링크 전압 균형을 위한 향상된 전압 제어 기법 (An Improved Voltage Control Scheme for DC-Link Voltage Balancing in a Four-Level Inverter)

  • 김래영;이요한;최창호;현동석
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제48권10호
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    • pp.544-554
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    • 1999
  • Multi-level inverters are now receiving widespread interest form the industrial drives for high power variable speed applications. Especially, for the high power variable speed applications, a diode clamped multi-level inverter has been widely used. However, it has the inherent problem that the voltage of the link capacitors fluctuates. This paper describes a voltage control scheme effectively to suppress the DC-link potential fluctuation for a diode clamped four-level inverter. The current to flow from/into the each link capacitor is analyzed and the operation limit is obtained when a conventional SVPWM is used. To overcome the operation limit, a modified carrier-based SVPWM is proposed. Various simulation and experiment results are presented to verify the proposed voltage control scheme for DC-link voltage balancing.

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DC-link 전압변동을 고려한 PMSM 토크제어의 성능 향상 방법 (A Performance Improvement Method of PMSM Torque Control Considering DC-link Voltage Variation)

  • 이정효;원충연
    • 조명전기설비학회논문지
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    • 제28권11호
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    • pp.112-122
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    • 2014
  • This paper proposes a PMSM torque control method considering DC-link voltage variation and friction torque. In general EV/HEV application, two dimensions look-up table(2D-LUT) is used for reference current generation due to its stable and robust torque control performance. Conventionally, this 2D-LUT is established by flux-torque table to overcome the DC-link voltage variation. However, the flux table establishment is more complex than the speed table establishment. Moreover, one flux data reflects several speed conditions in variable DC-link voltage, friction torque cannot be considered by using the flux table. In this paper, speed-torque 2D-LUT is used for current reference generation. With this table, PMSM torque control is well achieved regardless of DC-link voltage variation by the proposed control method. Simulation and experimental results validate improvement of torque control error through friction torque compensation.

Estimation of Allowable Path-deviation Time in Free-space Optical Communication Links Using Various Aircraft Trajectories

  • Kim, Chul Han
    • Current Optics and Photonics
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    • 제3권3호
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    • pp.210-214
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    • 2019
  • The allowable path-deviation time of aircraft in a free-space optical communication system has been estimated from various trajectories, using different values of aircraft speeds and turn rates. We assumed the existence of a link between the aircraft and a ground base station. First, the transmitter beam's divergence angle was calculated through two different approaches, one based on a simple optical-link equation, and the other based on an attenuation coefficient. From the calculations, the discrepancy between the two approaches was negligible when the link distance was approximately 110 km, and was under 5% when the link distance ranged from 80 to 140 km. Subsequently, the allowable path-deviation time of the aircraft within the tracking-error tolerance of the system was estimated, using different aircraft speeds, turn rates, and link distances. The results indicated that the allowable path-deviation time was primarily determined by the aircraft's speed and turn rate. For example, the allowable path-deviation time was estimated to be ~3.5 s for an aircraft speed of 166.68 km/h, a turn rate of $90^{\circ}/min$, and a link distance of 100 km. Furthermore, for a constant aircraft speed and turn rate, the path-deviation time was observed to be almost unchanged when the link distance ranged from 80 to 140 km.