• Korean Journal of Optics and Photonics
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• v.4 no.1
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• pp.15-21
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• 1993

This paper describes the design and development of a KrF excimer laser stepper and discusses the detailed system parameters and characterization data obtained from the performance test. We have developed a deep UV step-and-repeat system, operating at 248 nm, by retrofitting a commercial modules such as KrF excimer laser, precision wafer stage and fused silica illumination and 5X projection optics of numerical aperture 0.42. What we have developed, to the basic structure, are wafer alignment optics, reticle alignment system, autofocusing/leveling mechanisms and environment chamber. Finally, all these subsystem were integrated under the control of microprocessor-based controllers and computer. The wafer alignment system comprises the OFF-AXIS and the TTL alignment. The OFF-AXIS alignment system was realized with two kinds of optics. One is the magnification system with the image processing technique and the other is He-Ne laser diffraction type system using the alignment grating on the wafer. 'The TTL alignment system employs a dual beam inteferometric method, which takes advantages of higher diffraction efficiency compared with other TTL type alignment systems. As the results, alignment accuracy for OFF-AXIS and TTL alignment system were obtained within 0.1 $\mu\textrm{m}$/ 3 $\sigma$ for the various substrate on the wafers. The wafer focusing and leveling system is modified version of the conventional systems using position sensitive detectors (PSD). This type of detection method showed focusing and leveling accuracies of about $\pm$ 0.1 $\mu\textrm{m}$ and $\pm$ 0.5 arcsec, respectively. From the CD measurement, we obtained 0.4 $\mu\textrm{m}$ resolution features over the full field with routine use, and 0.3 $\mu\textrm{m}$ resolution was attainable under more strict conditions.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.34 no.12B
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• pp.1418-1425
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• 2009

This paper proposes a novel FTL (Flash Translation Layer) algorithm based on sector-level mapping to reduce the number of total erase operations in flash memory accesses. The proposed algorithm can reduce the number of erase operations by utilizing the sector-level mapping table when writing data at flash memory. Sector-level mapping technique reduces flash memory access time and extendsthe life time of the flash memory. In the algorithm, wear-leveling is implemented by selecting victim blocks having the minimal number of erase operations, when empty spaces for write are not available. To evaluate the performance of the proposed FTL algorithm, experiments were performed on several applications, such as MP3 players, MPEG players, web browsers and document editors. The proposed algorithm reduces the number of erase operations by 72.4% and 61.9%, when compared with well-known BAST and FAST algorithms, respectively.

• Journal of the Korean Institute of Intelligent Systems
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• v.19 no.2
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• pp.212-217
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• 2009

There are rule-based learning method and statistic based learning method and so on which represent learning method for hierarchy relation between domain term. In this paper, we propose to leveling and similarity measure using the extended AHP of fuzzy term in Information system. In the proposed method, we extract fuzzy term in document and categorize ontology structure about it and level priority of fuzzy term using the extended AHP for specificity of fuzzy term. the extended AHP integrates multiple decision-maker for weighted value and relative importance of fuzzy term. and compute semantic similarity of fuzzy term using min operation of fuzzy set, dice's coefficient and Min+dice's coefficient method. and determine final alternative fuzzy term. after that compare with three similarity measure. we can see the fact that the proposed method is more definite than classification performance of the conventional methods and will apply in Natural language processing field.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.12
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• pp.958-962
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• 2009

Flash memory, which replaces hard disk recently, has different physical characteristics with hard disk. For the performance of flash memory based storage system, many researches over OS and file system layers has been doing. In this paper, we propose the architecture of flash memory based storage which uses information of page invalidation when file deletion occurs from upper layer. Also, we evaluate the performance of proposed system. Proposed system effectively increases IO performance by using page invalidation information to block merge and wear leveling algorithms.

• Structural Engineering and Mechanics
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• v.82 no.3
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• pp.313-323
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• 2022

Steel laminated elastomeric bearings are commonly used in bridge structures to control displacements and rotations and transfer forces from the superstructure to the substructure. Proper knowledge of design, fabrication and erection procedures is important to ensure stability and adequate structural performance during the lifetime of the bridge. Difference in elevations sometimes leads to large size gaps between the bearing and the girder which makes the grout thickness that is commonly used for leveling deviate beyond standards. This paper investigates the structural response of High Strength Fiber Reinforced Cementitious (HSFRC) thin plinths that are used to close gaps between bearing pads and precast girders. An experimental program was developed for this purpose where HSFRC plinths of different size were cast and tested under vertical loads that simulate bridge loading in service. The structural performance of the plinths was closely monitored during testing, mainly crack propagation, vertical reaction and displacement. Analytically, the HSFRC plinth was analyzed using the beam on elastic foundation theory as the supporting elastomeric bearing pads are highly compressible. Closed form solutions were derived for induced displacement and forces and comparisons were made between analytical and experimental results. Finally, recommendations were made to facilitate the practical use of HSFRC plinths in bridge construction based on its enhanced load carrying capacity in shear and flexure.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.9
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• pp.54-62
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• 2015

Although NAND flash-based SSD (Solid-State Drive) provides superior performance in comparison to HDD (Hard Disk Drive), it has a major drawback in write endurance. As a result, the lifetime of SSD is determined by the workload and thus it becomes a big challenge in current technology trend of such as the shifting from SLC (Single Level Cell) to MLC (Multi Level cell) and even TLC (Triple Level Cell). Most previous studies have dealt with wear-leveling or improving SSD lifetime regarding hardware architecture. In this paper, we propose the optimal configuration of host I/O stack focusing on file system, I/O scheduler, and link power management using JEDEC enterprise workloads in terms of WAF (Write Amplification Factor) which represents the efficiency perspective of SSD life time especially for host write processing into flash memory. Experimental analysis shows that the optimum configuration of I/O stack for the perspective of SSD lifetime is MinPower-Dead-XFS which prolongs the lifetime of SSD approximately 2.6 times in comparison with MaxPower-Cfq-Ext4, the best performance combination. Though the performance was reduced by 13%, this contributions demonstrates a considerable aspect of SSD lifetime in relation to I/O stack optimization.

• Proceedings of the Korean Society of Surveying, Geodesy, Photogrammetry, and Cartography Conference
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• 2006.04a
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• pp.457-462
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• 2006

Coastline has been considered as fundamental geographic information of a nation. Recently, the coastlines of higher resolution and accuracy with less update period ever than before are increasingly required. This requirement cannot be easily satisfied with the most traditional methods based on field survey such as leveling or GPS measurements. The newly developed airborne LIDAR system can be used as a promising alternative since it rapidly acquire numerous three-dimensional points densely sampled from the terrain around the coastline. Hence, in this study we developed a nearly automatic method to extract the coastline from LIDAR data and applied it to real data to verify its performance. From the comparison of the extracted coastlines with those from a digital map, we conclude that the proposed method can provide more accurate and precise lines.

• Journal of Power Electronics
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• v.9 no.6
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• pp.874-883
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• 2009

This paper deals with an integrated voltage and frequency (VF) controller for isolated asynchronous generators (IAG) driven by a constant power pico-hydro uncontrolled turbine feeding three-phase four-wire loads. The proposed VF controller is used to control the frequency and voltage of an IAG with load leveling. Such a VF controller is also known as an integrated electronic load controller (IELC) which is realized using an isolated star/polygon transformer with a voltage source converter (VSC) and a battery at its DC bus. The proposed generating system with a VFC is modeled and simulated in MATLAB along with Simulink and Simpower system (SPS) toolboxes. The simulated results are presented to demonstrate the performance of an isolated asynchronous generator feeding three-phase four-wire loads with neutral current compensation.

• Journal of the Korea Institute of Military Science and Technology
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• v.11 no.6
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• pp.30-37
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• 2008

The ARS(Attitude Reference System) calculates an attitude of a vehicle using inertial angular rate sensors and acceleration sensors. The attitude error of ARS increases due to the integration of angular rate sensor output. To reduce the attitude error an acceleration of sensor is used similar to leveling method of INS(Inertial Navigation System). When an acceleration of vehicle is increased, it is difficult to calculate the attitude error using acceleration sensor output. In this paper the estimation method of acceleration due to the attitude error only is proposed. Two methods of the attitude calculation depending on vehicle dynamics and the integration method of these two methods are proposed. To verify its performance the monte carlo simulation is performed and shows that it bounds attitude error of ARS to reasonable level.

• Proceedings of the IEEK Conference
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• 2003.11b
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• pp.15-18
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• 2003

Flash memory becomes more important for its fast access speed, low-power, shock resistance and nonvolatile storage. But its native restrictions that have limited 1ifetime, inability of update in place, different size unit of read/write and erase operations need to managed by FTL(Flash Translation Layer). FTL has to control the wear-leveling, address mapping, bad block management of flash memory. In this paper, we focuses on the fast access to address mapping table and proposed the way of faster valid page search in the flash memory using the VPLT(Valid Page Lookup Table). This method is expected to decrease the frequency of access of flash memory that have an significant effect on performance of read and block-transfer operations. For the validations, we implemented the FTL based on Windows CE platform and obtained an improved result.