• 제목/요약/키워드: Leakage signal

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Dual-band Predistortion Linear Power Amplifier for Base-station Application (기지국용 이중 대역 전치 왜곡 선형 전력 증폭기)

  • Choi, Heung-Jae;Jeong, Yong-Chae;Kim, Chul-Dong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.17 no.10 s.113
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    • pp.959-966
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    • 2006
  • This paper proposes a new concept about dual band predistortion linear power amplifier(PD LPA) using diplexer for digital cellular ($f_o$=880 MHz) and IMT-2000($f_o$=2,140 MHz) base stations. The diplexer is composed of low pass filter having defected ground structure(BGS) microstrip line and high pass filter having high-Q lumped capacitors and distributed elements. The proposed predistorter adopts a reflection type intermodulation signal generator with 3 dB hybrid coupler for good reflection characteristic. for a forward link one carrier CDMA IS-95A 1FA and WCDMA 1FA signal, the proposed dual band PD LPA shows the adjacent channel leakage ratio(ACLR) improvement about 10 dB and 9.36 dB for digital cellular and IMT-2000 band, respectively.

A study on the low power architecture of multi-giga bit synchronous DRAM's (Giga Bit급 저전력 synchronous DRAM 구조에 대한 연구)

  • 유회준;이정우
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.11
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    • pp.1-11
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    • 1997
  • The transient current components of the dRAM are analyzed and the sensing current, data path operation current and DC leakage current are revealed to be the major curretn components. It is expected that the supply voltage of less than 1.5V with low VT MOS witll be used in multi-giga bit dRAM. A low voltage dual VT self-timed CMOS logic in which the subthreshold leakage current path is blocked by a large high-VT MOS is proposed. An active signal at each node of the nature speeds up the signal propagation and enables the synchronous DRAM to adopt a fast pipelining scheme. The sensing current can be reduced by adopting 8 bit prefetch scheme with 1.2V VDD. Although the total cycle time for the sequential 8 bit read is the same as that of the 3.3V conventional DRAM, the sensing current is loered to 0.7mA or less than 2.3% of the current of 3.3V conventional DRAM. 4 stage pipeline scheme is used to rduce the power consumption in the 4 giga bit DRAM data path of which length and RC delay amount to 3 cm and 23.3ns, respectively. A simple wave pipeline scheme is used in the data path where 4 sequential data pulses of 5 ns width are concurrently transferred. With the reduction of the supply voltage from 3.3V to 1.2V, the operation current is lowered from 22mA to 2.5mA while the operation speed is enhanced more than 4 times with 6 ns cycle time.

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Study on Integrated for Capacitive Pressure Sensor (용량성 압력센서의 집적화에 관한 연구)

  • 이윤희
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.35T no.1
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    • pp.48-58
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    • 1998
  • For the purpose of designing novel capacitance pressure sensor, several effects on sensitivity such as parasitic capacitance effects, temperature/thermal drift and leakage current have to be eleiminated. This paper proposed the experimental studies on frequency compensation method by electronic circuit technique, C-V converting method with switched capacitor and C-F converting method with schmitt trigger circuit. The third interface circuit by frequency compensation method is composed to eliminate the drift and leakage component by comparision sensing frequency with reference frequency. The signal transmission is realized by digital signal to minimize the influence of noise and high resolution is obtained by means of increasing the number of digital bits. In the fabricated high performance C-V interface, the offset voltage was not appeared, and in case of voltage source, 4.0V, feed back capacitance, 10㎊, the pressure, 0~10 ㎪, the sensitivity of C-V converter is 28 ㎷/㎪.V, the temperature drift characteristic, 0.051 %F.S./$^{\circ}C$ and C-F converter shows -6.6 Hz/pa, 0.078 %F.S./$^{\circ}C$ respectively, relatively good ones.

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Design of Compensated Digital Interface Circuits for Capacitive Pressure Sensor (용량형 압력센서용 디지탈 보상 인터페이스 회로설계)

  • Lee, Youn-Hee;Sawada, Kouji;Seo, Hee-Don;Choi, Se-Gon
    • Journal of Sensor Science and Technology
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    • v.5 no.5
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    • pp.63-68
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    • 1996
  • In order to implement the integrated capacitive pressure sensors, which contains integrated interface circuits to detect the electrical output signal, several main factors that have a bad effect on the characteristics of sensors must be improved, such as parasitic capacitance effects, temperature/thermal drift, and the leakage current of a readout circuitry. This paper describes the novel design of the dedicated CMOS readout circuitry that is consists of two capacitance to frequency converters and 4 bit digital logic compensating circuits. Dividing the oscillation frequency of a sensing sensor by that of reference sensor, this circuit is designed to eliminate the thermal/temperature drift and the effect of the leakage currents, and to access a digital signals to obtain a high signal-to-noise(S/N)ratio. Therefore, the resolution of this circuit can be increased by increasing the number of the digital bits. Digital compensated circuits of this circuits, except for the C-F converters, are fabricated on a FPGA chip, and fundamental performance of the circuits are evaluated.

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Femtocell Searching Technique Using Synchronization Signals for Next-Generation Mobile Communication Systems (차세대 이동통신 시스템에서 동기신호를 이용한 펨토셀 탐색 기법)

  • Kim, Yeong Jun;Cho, Yong Soo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.38A no.1
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    • pp.44-57
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    • 2013
  • In this paper, we propose a femtocell searching technique which can prevent a macrocell UE(user equipment) from losing synchronism to its serving macrocell near closed access femtocells in co-channel deployment due to the leakage of femtocell signals by using a CS(Common Signal). The CS, commonly transmitted by femtocells in a macrocell at the same time, enables the macrocell UEs to be kept synchronized with their serving macrocells since the CINR(Carrier to Interference and Noise Ratio) of base stations in macrocell can be kept high even near closed access femtocells. Also, the CS is designed in such a way that a macrocell UE can recognize the existence of femtocell by using the metric CSCINR(Common Signal Carrier to Interference and Ratio) measured with CS. In addition, the proposed femtocell searching technique can reduce the frequency of femtocell searching trial by using the metric on mobility of a macrocell UE defined in this paper, and the reduction of the frequency of handover trial can be also expected as a byproduct.

Degradation of RF Receiver Sensitivity Due to TVS Diode (TVS Diode에 의한 안테나 무선감도 저하 분석)

  • Hwang, Yoon-Jae;Park, Je-Kwang;Yook, Jong-Gwan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.10
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    • pp.979-986
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    • 2013
  • In this paper, a TVS diode which is commonly used as a ESD protector in wireless communication devices could cause antenna wireless sensitivity to decrease has been analyzed. When a smartphone doesn't have enough space to place many components, there would be its speaker near antenna area. In order to protect ESD coming through the speaker there also could be a TVS within antenna GND area. Digital audio signal which was sent to speaker and CDMA RF communication signal coupled from antenna was mixed by TVS. And this leakage current running through TVS resulted in decrease of antenna wireless sensitivity. The results of various experiments can be explained using circuit simulation. Following works will give us some insights that can reduce unwanted summation of digital and RF signal due to nonlinearity of ESD protectors.

A Side Channel Attack with Vibration Signal on Card Terminal (진동 신호를 이용한 카드 단말기 부채널 공격)

  • Jang, Soohee;Ha, Youngmok;Yoon, Jiwon
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.24 no.6
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    • pp.1045-1053
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    • 2014
  • In this paper, we assume that the information leakage through side-channel signal may occur from the card payment terminal and newly introduce a real application attack model. The attack model is a side channel attack based on vibration signals, which are detected by a small sensor attached on card terminal by attacker. This study is similar to some other studies regarding side channel attack. However, this paper is different in that it is based on the non-language model. Because the financial transaction information such as a card number, password, mobile phone number and etc cannot have a constant pattern. In addition, there was no study about card terminal. Therefore, this new study is meaningful. We collected vibration signals on card terminal with a small wireless sensor and analyzed signal data with statistical signal processing techniques using spectrum of frequency domain and principal component analysis and pattern recognition algorithms. Finally, we evaluated the performances by using real data from the sensor.

The Design of a Sub-Harmonic Dual-Gate FET Mixer

  • Kim, Jeongpyo;Lee, Hyok;Park, Jaehoon
    • Journal of electromagnetic engineering and science
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    • v.3 no.1
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    • pp.1-6
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    • 2003
  • In this paper, a sub-harmonic dual-gate FET mixer is suggested to improve the isolation characteristic between LO and RF ports of an unbalanced mixer. The mixer was designed by using single-gate FET cascode structure and driven by the second harmonic component of LO signal. A dual-gate FET mixer has good isolation characteristic since RF and LO signals are injected into gatel and gate2, respectively. In addition, the isolation characteristic of a sub-harmonic mixer is better than that of a fundamental mixer due to the large frequency separation between the LO and RF frequencies. As RF power was -30 ㏈m and LO power was 0 ㏈m, the designed mixer yielded the -47.17 ㏈m LO-to-RF leakage power level, 10 ㏈ conversion gain, -2.5 ㏈m OIP3, -12.5 ㏈m IIP3 and -1 ㏈m 1 ㏈ gain compression point. Since the LO-to-RF leakage power level of the designed mixer is as good as that of a double-balanced mixer, the sub-harmonic dual-gate FET mixer can be utilized instead.

The development on Power supply for Pulsed $CO_2$ laser using half-rectified AC frequency control and leakage transformer (누설 변압기를 이용한 반파 AC 주파수 제어형 $CO_2$ 레이저의 전원장치 개발)

  • Chung, Hyun-Ju;Kim, Do-Wan;Lee, Dong-Hoon;Lee, Yu-Su;Kim, Hee-Je;Cho, Jung-Soo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.05b
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    • pp.82-85
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    • 2000
  • We introduce pulsed $CO_2$ laser power supply excited by half-wave rectified 60Hz AC discharge some advantage of cost and size compared to a typical pulsed power supply. AC frequency is adjusted from 10Hz to 60Hz to control laser output. In this laser, a low voltage open loop control for high voltage AC discharge circuits is employed to avoid the HV sampling or switching. The control is achieved by using a ZCS circuit and a PIC one-chip microprocessor that control the gate signal of SCR precisely. The pulse repetition rate is limited by 60Hz due to a high leakage inductance. The maximum laser output was obtained about 20W at the condition of total pressure, 18Torr and pulse repetition rate,60Hz.

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Analysis of Acoustic Emission Signals from Fluid Leakage (유체 누출에서의 음향방출 신호분석)

  • 김용민;윤용구;김호철
    • Transactions of the Korean Society of Mechanical Engineers
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    • v.14 no.2
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    • pp.413-421
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    • 1990
  • Acoustic emission signals due to leak from circular holes of 0.4, 1, 2 and 4mm diameter and rectangular slits of different geometry having the same cross section as 4mm diameter hole was studied both analytically and experimentally. Acoustic emission signals from a wide-band type transducer were transformed to digital signals through a digital oscilloscope, and $V_{rms}$ and frequency spectrum were obtained by processing digital signals. Relationships between acoustic parameters and fluid mechanical parameters were derived analytically. A quadrapole aerodynamic model was applied in the analysis of leak from the circular holes and $V_{rms}$ was found to be proportional to the root square of leak rate through the circular hole. A modified model based on dipole source mechanism and laminar equivalent diameter was applied in the analysis of leak signals from the rectangular slits. In the case of constant pressure, $V_{rms}$ increased as the laminar equivalent diameter of slit decreased. In the case of constant laminar equivalent diameter, however the result was similar to that for leak from the circular hole. The frequency spectra of leak signals shows the same frequency characteristics irrespective of the pressure difference.rence.