• Electronics and Telecommunications Trends
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• v.35 no.4
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• pp.1-10
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• 2020

Since the 1960s, semiconductor packaging technology has developed into electrical joining techniques using lead frames or C4 bumps using tin-lead solder compositions based on traditional reflow processes. To meet the demands of a highly integrated semiconductor device, high reliability, high productivity, and an eco-friendly simplified process, packaging technology was required to use new materials and processes such as lead-free solder, epoxy-based non cleaning interconnection material, and laser based high-speed processes. For next generation semiconductor packaging, the study status of two epoxy-based interconnection materials such as fluxing and hybrid underfills along with a laser-assisted bonding process were introduced for fine pitch semiconductor applications. The fluxing underfill is a solvent-free and non-washing epoxy-based material, which combines the underfill role and fluxing function of the Surface Mounting Technology (SMT) process. The hybrid underfill is a mixture of the above fluxing underfill and lead-free solder powder. For low-heat-resistant substrate applications such as polyethylene terephthalate (PET) and high productivity, laser-assisted bonding technology is introduced with two epoxy-based underfill materials. Fluxing and hybrid underfills as next-generation semiconductor packaging materials along with laser-assisted bonding as a new process are expected to play an active role in next-generation large displays and Augmented Reality (AR) and Virtual Reality (VR) markets.

• Journal of the Microelectronics and Packaging Society
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• v.31 no.2
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• pp.63-68
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• 2024

With the increasing use of transparent displays and flexible devices, polymer substrates offering excellent flexibility and strength are in demand. Since polymers are sensitive to heat, precise temperature control during the process is necessary. The study proposes a temperature measurement system for the laser processing area within the polymer base, aiming to address the drawbacks of using these polymer bases in laser-based selective processing technology. It presents the possibility of optimizing the process conditions of the polymer substrate through local temperature change measurements in the laser processing area. We developed and implemented the PDPT (Photodiode-based Planck Thermometry) to measure temperature in the laser-processing area. PDPT is a non-destructive, contact-free system capable of real-time measurement of local temperature increases. We monitored the temperature fluctuations during the laser processing of the polymer substrate. The study shows that the proposed laser-based temperature measurement technology can measure real-time temperature during laser processing, facilitating optimal production conditions. Furthermore, we anticipate the application of this technology in various laser-based processes, including essential micro-laser processing and 3D printing.

• Journal of the Korean Vacuum Society
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• v.16 no.1
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• pp.74-78
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• 2007

Much interests has been drawn for noble micro-engineering processes for the continuous size reduction on bulk materials from the field of micro-electronics with much downsized IC chips. A traditional microprocessing based on mechanical blade as well as a relatively long pulsed laser usually influence the physico-chemical properties of intact materials when the techniques are applied to process materials with a spatial resolution less than 10 microns. Meanwhile, ultrafast laser pulses are known to exhibit a very small heat-affect zone(HAE) compared to the traditional laser processing and to be applicable for the new functional materials with high performance in optical and electrical properties. In this report, we will review in brief the recent research works on the enhancement of micro-cutting speed of thin silicon wafer as well as the formation of Ge nanostructures based on ultrafast laser pulses.

• Journal of the Microelectronics and Packaging Society
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• v.23 no.4
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• pp.19-24
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• 2016

Along the few nano sizing dimensions of integrated circuit (IC) devices, acceptable interlayer material for design is inevitable. The interlayer which include dielectric, interconnect, barrier etc. needs to achieve not only electrical properties, but also mechanical properties for endure post manufacture process and prolonging life time. For developing intermetallic dielectric (IMD) the mechanical issues with post manufacturing processes were need to be solved. For analyzing specific structural problem and material properties Raman spectroscopy was performed for various researches in Si semiconductor based materials. As improve of the laser and charge-coupled device (CCD) technology the total effectiveness and reliability was enhanced. For thin film as IMD developed material could be analyzed by Raman spectroscopy, and diverse researches of developing method to analyze thin layer were comprehended. Also In-situ analysis of Raman spectroscopy is introduced for material forming research.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.319-319
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• 2013

Even though the fabrication methods of metal oxide based thin film capacitor have been well established such as RF sputtering, Sol-gel, metal organic chemical vapor deposition (MOCVD), ion beam assisted deposition (IBAD) and pulsed laser deposition (PLD), an applicable capacitor of printed circuit board (PCB) has not realized yet by these methods. Barium Strontium Titanate (BST) and other high-k ceramic oxides are important materials used in integrated passive devices, multi-chip modules (MCM), high-density interconnect, and chip-scale packaging. Thin film multi-layer technology is strongly demanded for having high capacitance (120 nF/$mm^2$). In this study, we suggest novel multi-layer thin film capacitor design and fabrication technology utilized by plasma assisted deposition and photolithography processes. Ba0.6Sr0.4TiO3 (BST) was used for the dielectric material since it has high dielectric constant and low dielectric loss. 5-layered BST and Pt thin films with multi-layer sandwich structures were formed on Pt/Ti/$SiO_2$/Si substrate by RF-magnetron sputtering and DC-sputtering. Pt electrodes and BST layers were patterned to reveal internal electrodes by photolithography. SiO2 passivation layer was deposited by plasma-enhanced chemical vapor deposition (PE-CVD). The passivation layer plays an important role to prevent short connection between the electrodes. It was patterned to create holes for the connection between internal electrodes and external electrodes by reactive-ion etching (RIE). External contact pads were formed by Pt electrodes. The microstructure and dielectric characteristics of the capacitors were investigated by scanning electron microscopy (SEM) and impedance analyzer, respectively. In conclusion, the 0402 sized thin film multi-layer capacitors have been demonstrated, which have capacitance of 10 nF. They are expected to be used for decoupling purpose and have been fabricated with high yield.