• Title/Summary/Keyword: Large fault

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The Development of a Fault Diagnosis Model Based on Principal Component Analysis and Support Vector Machine for a Polystyrene Reactor (주성분 분석과 서포트 벡터 머신을 이용한 폴리스티렌 중합 반응기 이상 진단 모델 개발)

  • Jeong, Yeonsu;Lee, Chang Jun
    • Korean Chemical Engineering Research
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    • v.60 no.2
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    • pp.223-228
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    • 2022
  • In chemical processes, unintended faults can make serious accidents. To tackle them, proper fault diagnosis models should be designed to identify the root cause of faults. To design a fault diagnosis model, a process and its data should be analyzed. However, most previous researches in the field of fault diagnosis just handle the data set of benchmark processes simulated on commercial programs. It indicates that it is really hard to get fresh data sets on real processes. In this study, real faulty conditions of an industrial polystyrene process are tested. In this process, a runaway reaction occurred and this caused a large loss since operators were late aware of the occurrence of this accident. To design a proper fault diagnosis model, we analyzed this process and a real accident data set. At first, a mode classification model based on support vector machine (SVM) was trained and principal component analysis (PCA) model for each mode was constructed under normal operation conditions. The results show that a proposed model can quickly diagnose the occurrence of a fault and they indicate that this model is able to reduce the potential loss.

A study on fault diagnosis of large chemical processes based on two-tier strategy (이단계 진단전략을 이용한 대형화학공정의 이상진단에 관한 연구)

  • 오영석;이병우;윤인섭
    • 제어로봇시스템학회:학술대회논문집
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    • 1997.10a
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    • pp.1428-1431
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    • 1997
  • This paper presents an efficient fault diagnosis methodology for lare chemical processes. The methodology is based on a two-tier strategy, When a falt occurs in a process, a top tier identifies the sector (process part or unit) that may contain the fault(s). Afterwards, a bottom tier or lower level evaluates the suspicious sector. The process modeling methodology based on functionality-behavior relations of process units, is proposed and utilized in the top-tier. This methodology models a target process as sequences of functions and variables and their relations. In the bottom tier, each sector has a dedicated diagostic module, which is tailored to the available information or models of the sector. For the sectors selected in the top-tier diagnosis, each diagnostic module is executed to identify the actual faults within the sector. Teh utility of the methodology is illustrated in the diagnosis of the CSTR with heat exchanger.

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Fault-tolerant clock synchronization for low-cost networked embedded systems (저비용 네트워크 기반 임베디드 시스템을 위한 시간동기 기술)

  • Lee, Dong-Ik
    • Journal of Sensor Science and Technology
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    • v.16 no.1
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    • pp.52-61
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    • 2007
  • Networked embedded systems using the smart device and fieldbus technologies are now found in many industrial fields including process automation and automobiles. However the discrepancy between a node's view of current time and the rest of the system can cause many difficulties in the design and implementation of a networked system. To provide a networked system with a global reference time, the problem of clock synchronization has been intensively studied over the decades. However, many of the existing solutions, which are mainly developed for large scale distributed computer systems, cannot be directly applied to embedded systems. This paper presents a fault-tolerant clock synchronization technique that can be used for a low-cost embedded system using a CAN bus. The effectiveness of the proposed method is demonstrated with a set of microcontrollers and DC motor-based actuators.

Frequency Analysis Method Based Fault Diagnosis of an Electrolytic Capacitor for Voltage Smoothing (주파수 분석기법을 이용한 전압 평활용 전해 커패시터의 고장진단)

  • Shon, Jin-Geun;Kim, Jin-Sik
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.58 no.2
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    • pp.207-213
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    • 2009
  • Electrolytic capacitors have been widely used in power electronics system because of the features of large capacitance, small size, high-voltage, and low-cost. Electrolytic capacitors, which is most of the time affected by aging effect, plays a very important role for the power electronics system quality and reliability. Therefore it is important to estimate the parameter of an electrolytic capacitor to predict the failure. This paper proposed a novel fault diagnosis method of an electrolytic capacitor used for voltage smoothing in boost DC converter. The equivalent series resistance(ESR) of electrolytic capacitor estimated from FFT result of filtered waveform of capacitor voltage/current. Main advantage of the proposed method include circuit simplicity and easy implementation. Simulation and experimental results are shown to verify the performance of the proposed method.

The Short Circuit Analysis of a Simplified Magnetic Shielding Type High-Tc Superconducting Fault Current Limiter (단순화된 자기차폐형 고온초전도한류기 단락 특성 해석)

  • 이찬주;이승제;장미혜;현옥배;최효상;고태국
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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    • 1999.02a
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    • pp.97-100
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    • 1999
  • Nowadays the high-Tc Superconducting Fault current Limiter (SFCL) is one of the superconducting devices which are very closed to commercialization. The most popular model of High-Tc SFCL is a magnetic shielding type. A superconductor of magnetic shielding type SFCL can be stable in the superconducting state, because there is no contact between the superconductor and the normal conductor. But this model needs large place to set up and in a fault condition, mechanical vibrations may happen to damage the superconductor or total device. In this paper, to solve these problems, the simplified model of magnetic shielding type SFCL was introduced.

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An analysis of The ground fault current Distribution of 22.9kV-Y Lines (22.9kV다중접지선로 지락고장점 대지유입전류 및 중성선분류 해석)

  • Lim Yong Hun;Hyun Duck Hwa;Choi Jong Gi
    • Proceedings of the KIEE Conference
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    • summer
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    • pp.473-475
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    • 2004
  • During ground faults in power system, large current and raised potential appear at nearby places. This paper presents an analytical procedure of the ground fault current for the towers of a transmission line(154kV) and distribution line(22.9kV) of an arbitrary number of spans during ground faults. In order to economically and securely protect against undesired consequences, it is necessary to evaluate as precisely as possible the value and distribution of the ground fault current.

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Web Server Application in The Operation of Chip Mounter (Chip Mounter 운영에서 Web Server 활용)

  • 임선종;김선호
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2003.06a
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    • pp.172-175
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    • 2003
  • The enterprise find a solution to the problems such as a reduction of manufacturing period, accurate analysis for customer demand, improvement for customer service and rise of manufacture accomplishment. Internet is a good solution to such problems. Internet offers WWW(World Wide Web), remote control, file transfer and e-mail service. Among the services, WWW takes large portion because of convenient GUI, easy information search and unlimited information registration. Remote Monitoring Server(RMS) system that uses network service is constructed for chip mounter. Hardware base consists of RMS, chip mounter and C/S(Customer Service) server. Software includes DBMS and various modules in server home page. This provide product number, bad product number, trouble code, content and countermeasure in real-time information module, user information in setup module, detailed error information in fault diagnosis module, fault history in fault history module and customer information in customer service management module.

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An extension of testability analysis for sequential circuits (순차회로를 위한 검사성 분석법의 확장)

  • 김신택;민형복
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.4
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    • pp.75-84
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    • 1995
  • Fault simulators are used for accurate evaluation of fault coverages of digital circuits. But fault simulation becomes time and memory consuming job because computation time is proportional to wquare of size of circuits. Recently, several approximate algorithms for testability analysis have been published to cope with the problems. COP is very fast but cannot be used for sequential circuits, while STAFAN can ve used for sequential circuits but requires large amount of computation because it utilizes logic simulation results. In this paper EXTASEC(An Extension of Testability Analysis for Sequential Circuits) is proposed. It is an extension of COP in the sense that it is the same as COP for combinational circuits, but it can handle sequential circuits, Xicontrollability and backward line analysis are key concept for EXTASEC. Performance of EXTASEC is proven by comparing EXTASEC with a falut simulator, STAFAN, and COP for ISCAS circuits, and the result is demonstated.

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$100 A/mm^2$ Class Bi-2223 Tapes in Electromechanical Devices (전력기기에서 $100 A/mm^2$급 Bi-2223테이프)

  • 류경우;최경주;성기철;류강식
    • Progress in Superconductivity and Cryogenics
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    • v.4 no.1
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    • pp.55-60
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    • 2002
  • $100 A/mm^2$ class Bi-2223 tapes have recently become commercially available. Some important characteristics of the tapes, e .g. critical current, ac loss, characteristics at joint, fault current characteristics, are required for an application such as a power cable or a power transformer. In this paper they have been investigated experimentally. The results indicate that the self-field loss of the high current density tapes is not negligible, compared to resistive loss in a copper wire for the same currents. In a cable, the self-field loss for relatively large currents is much larger than the magnetization loss due to an external field. But in a transformer, the magnetization loss is dominant, compared to the self-field loss. Finally the fault current characteristics show that the high current density tapes are never safe from burn-out even for fault currents with a few cycles.

Power Transformer Modeling and Transient Analysis using PSCAD (PSCAD를 이용한 전력용 변압기 모델링과 과도 해석)

  • Park, Chul-Won
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.65 no.2
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    • pp.122-129
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    • 2016
  • Current differential protection relaying with second harmonic restraint is the main protection for large capacity power transformer. PSCAD simulation program is widely used for modeling of dynamic varying transients phenomena. This paper deals with a power transformer model and transients analysis using PSCAD software to develop IED for power transformer. Simulation was carried out using a three phase 40MVA, 154/22.9kV, 60Hz, two-winding transformer with Y-Y connection used in actual fields. The paper analyzed transformer magnetizing inrush, external fault, and internal fault conditions with this model in the time domain. In addition, we performed an analysis in the frequency domain using FFT during several conditions.