• 반도체디스플레이기술학회지
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• 제15권1호
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• pp.6-11
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• 2016

For high volume manufacturing using extreme ultraviolet (EUV) lithography, mask protection from contamination during lithography process must be solved, and EUV pellicle is the strongest solution. Based on the technical requirements of EUV pellicle, EUV pellicle should have large membrane area ($110{\times}140mm^2$) with film transmittance over 90% and mechanical stability. Even though pellicle that satisfies size standard with high transmittance has been reported, its mechanical stability has not been confirmed, nor is there a standard to evaluate the mechanical stability. In this study, we suggest a rather simple method evaluating mechanical stability of pellicle membrane using spin-coater which can emulate the linear accelerated motion. The test conditions were designed by simulating the acceleration distribution inside pellicle membrane through correlating the linear acceleration and centripetal acceleration, which occurs during linear movement and rotation movement, respectively. By these simulation results, we confirmed the possibility of using spin-coater to evaluate the mechanical stability of EUV pellicle.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.1791-1794
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• 2006

For system-on-glass (SoG) with low-temperature poly-silicon (LTPS) thin film transistor (TFT), a new system interface architecture and timing controller are developed. With the newly developed system interface architecture, line memory can be eliminated which would take large area of SoG display panel. The system interface and timing controller are targeted for the application for 6-bit gray scale, 60-frames/s qVGA format.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2010년도 추계학술대회 논문집
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• pp.393-394
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• 2010

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1997년도 추계학술대회 논문집
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• pp.202-205
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• 1997

We investigated grain boundary effect for terrestrial applications of solar cell\ulcorner with low cost, large area, and high efficiency. Grain boundaries are known as potential barriers and recombination centers for the photo-generated charge carriers, which make it difficult to achieve a high efficiency cell. To reduce these effects of grain boundaries, we investigated various influencing factors such as thermal treatments, various grid patterns, selective wet etchings for grain boundaries, buried contact metallizations along grain boundaries, and use of metallic thin films. From the various grid patterns we learned that the series resistance of solar cell reduced open circuit voltage and consequently decreased the cell efficiency. This paper describes the effect of various grid patterns and the employment of metallic thin films for a top electrode.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2011년도 추계학술발표대회
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• pp.35.1-35.1
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• 2011

New photovoltaic (PV) materials and manufacturing approaches are needed for meeting the demand for lower-cost solar cells. The prototypal thin-film photovoltaic absorbers (CdTe and $Cu(In,Ga)Se_2$) can achieve solar conversion efficiencies of up to 20% and are now commercially available, but the presence of toxic (Cd,Se) and expensive elemental components (In, Te) is a real issue as the demand for photovoltaics rapidly increases. To overcome these limitations, there has been substantial interest in developing viable alternative materials, such as $Cu_2ZnSnS_4$ (CZTS) is an emerging solar absorber that is structurally similar to CIGS, but contains only earth abundant, non-toxic elements and has a near optimal direct band gap energy of 1.4~1.6 ev and a large absorption coefficient of ${\sim}10^4\;cm^{-1}$. The CZTS absorber layers are grown and investigated by various fabrication methods, such as thermal evaporation, e-beam evaporation with a post sulfurization, sputtering, non-vacuum sol-gel, pulsed laser, spray-pyrolysis method and electrodeposition technique. In the present work, we report an alternative method for large area deposition of CZTS thin films that is potentially high throughput and inexpensive when used to produce monolithically integrated solar panel modules. Specifically, we have developed an aqueous chemical approach based on chemical bath deposition (CBD) with a subsequent sulfurization heat treatment. Samples produced by our method were analyzed by scanning electron microscopy, X-ray diffraction, transmission electron microscopy, absorbance and photoluminescence. The results show that this inexpensive and relatively benign process produces thin films of CZTS exhibiting uniform composition, kesterite crystal structure, and good optical properties. A preliminary solar cell device was fabricated to demonstrate rectifying and photovoltaic behavior.

• 한국재료학회지
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• 제7권5호
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• pp.431-433
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• 1997

We investigated a double ring resonator(DRR)device to improve the resonating Q value of a superconductor resonator. To make a DRR device, we made a large area YBCO film on a MgO substrate by pulsed laser deposition(PLD). Thetransition temperature was 88 K and the film was uniformly deposited. We also deposited 500$\AA$SrTiO$_{3}$on the YBCO thin film to protect the superconducting properties from degradation. The loaded Q value was measured as 50000 from simulation and as 2000 from experiment near 10GHz at 77K.

• Journal of Magnetics
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• 제13권2호
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• pp.53-56
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• 2008

This study proposes a simple nano-patterning process for the fabrication of magnetic nanodot arrays on a large area substrate. Ni nanodots were fabricated on a large area (4 inches in diameter) Si substrate using the soft lithographic technique using self-assembled surface micelles of Polystyrene-block-Poly(methyl methacrylate) (PS-b-PMMA) diblock copolymer formed at the air/water interface as a mask. The hexagonal array of micelles was successfully transferred to a Ni thin film on a Si substrate using the Langmuir-Blodgett technique. After ion-mill dry etching, a magnetic Ni nanodot array with a regular hexagon array structure was obtained. The Ni nanodot array showed in-plane easy axis magnetization and typical soft magnetic properties.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.479-479
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• 2011

Flexible inverters based on complementary thin-film transistor (CTFTs) are important because they have low power consumption and other advantages over single type TFT inverters. In addition, integrated CTFTs in flexible electronic circuits on low-cost, large area and mechanically flexible substrates have potentials in various applications such as radio-frequency identification tags (RFIDs), sensors, and backplanes for flexible displays. In this work, we introduce flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The CTFTs were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. Basic electrical characteristics of individual transistors and the whole CTFTs were measured by a semiconductor parameter analyzer (HP4145B, Agilent Technologies) at room temperature in the dark. Performance of those devices then was measured under static and dynamic mechanical deformation. Effects of cyclic bending were also examined. The voltage transfer characteristics (Vout- Vin) and voltage gain (-dVout/dVin) of flexible inverter circuit were analyzed and the effects of mechanical bending will be discussed in detail.

• 한국통신학회논문지
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• 제24권12A호
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• pp.2002-2007
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• 1999

본 논문에서는 유리기판 위에 고상결정화(SPC)로 제작된 n-채널 다결정 박막 트랜지스터(poly-Si TFT's)에 대해 전류-전압 특성, 이동도, 누설전류, 문턱전압, 그리고 부임계 기울기 등과 같은 전기적 특성을 측정함으로서 대면적, 고밀도 TFT-LCD에의 적용 가능성을 조사하였다. 채널 길이가 각각 2, 10, 25$\mu\textrm{m}$로 제작된 n-채널 poly-Si TFT에서, 전계 효과 이동도는 각각 11, 125, 116 $\textrm{cm}^2$/V-s이었으며, 누설전류는 각각 0.6, 0.1, 0.02 pA/$\mu\textrm{m}$로 나타났다. 또한 낮은 문턱전압과 q임계 기울기 그리고 양호한 ON-OFF ratio이 나타났다. 따라서, SPC로 제작된 poly-Si TFT는 대형유리기판에 디스플레이 패널과 구동시스템을 동시에 집적하는 대면적, 고밀도 TFT-LCD에 적용 가능한 것으로 판단된다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 1999년도 제17회 학술발표회 논문개요집
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• pp.73-73
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• 1999

A large area negative metal ion beam source is developed. Kinetic ion beam of the incident metal ions yields a whole nucleation and growth phenomena compared to the conventional thin film deposition processes. At the initial deposition step one can engineer the surface and interface by tuning the energy of the incident metal ion beams. Smoothness and shallow implantation can be tailored according to the desired application process. Surface chemistry and nucleation process is also controlled by the energy of the direct metal ion beams. Each individual metal ion beams with specific energy undergoes super-thermodynamic reactions and nucleation. degree of formation of tetrahedral Sp3 carbon films and beta-carbon nitride directly depends on the energy of the ion beams. Grain size and formation of polycrystalline Si, at temperatures lower than 500deg. C is obtained and controlled by the energy of the incident Si-ion beams. The large area metal ion source combines the advantages of those magnetron sputter and SKIONs prior cesium activated metal ion source. The ion beam source produces uniform amorphous diamond films over 6 diameter. The films are now investigated for applications such as field emission display emitter materials, protective coatings for computer hard disk and head, and other protective optical coatings. The performance of the ion beam source and recent applications will be presented.