• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.27 no.10
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• pp.59-68
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• 2013

This paper proposes the boost type bidirectional DC/DC converter with high efficiency for electric vehicle using an interleave method. This interleave method can reduce the system size because it reduces the ripple of output voltage and input current with no add to extra filter. Proposed system is consist of two converters and applies to interleaved method through phase shift to each converter. And it implements the high boost through voltage double and series construction of output port. Also, it reduces the price and increases the efficiency as operating the ZCS by leakage inductance of transformer and capacitor of voltage double with not add special reactor. Proposed DC/DC converter using interleave method is proved the validity through the result of PSIM simulation and experiment of 5kW DC/DC converter.

• Journal of Korea Multimedia Society
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• v.11 no.6
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• pp.828-834
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• 2008

This paper presents high-spread (HS) random interleavers based interleave-division multiple access (IDMA) scheme for the 4th generation mobile radio system. High-spread feature of a random interleaver offers high-spread characteristics to interleavers and thus produces extrinsic values with low correlation. As interleavers are key components for user separation in the IDMA, the HS interleavers with this feature are employed and analyzed in the IDMA for performance improvement. In addition, by replacing random interleavers with the HS interleavers in the IDMA, bandwidth efficiency is achieved by means of reducing the length of the repetition code. Performance evaluation shows that the proposed scheme of the IDMA with the HS interleavers provides superior BER performance and improved bandwidth efficiency.

• Proceedings of the KIPE Conference
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• 2014.07a
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• pp.329-330
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• 2014

This paper presents an analysis of the interleaved effects for the secondary winding distribution of a toroidal transformer. The equations to calculate the leakage inductance are derived using the MMF diagram for the distributed secondary windings. The simulation and experimental results are provided to show the effect of the leakage inductance reduction.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.5 s.347
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• pp.104-112
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• 2006

In this thesis, we analyze performance related to reduction scheme of intercell interference causing serious problems in wiBro system. Frequency reusing factor(FUF) is 1 in WiBro system, and it means that a adjacent cell uses same frequency band. This channel environment raises intercell interference problem, which provokes serious problems related to system performance and channel capacity. Consequently, it affects deterioration in system performance as a whole. We analyze intercell interference when appling a various schemes such as (DCA)Dynamic Channel Allocation, CS(Channel Segregation), IMUFR(Interference Mitigation Using Frequency Reuse), IDMA(Interleave Division Multiple Access), IDMA(Interleave Division Multiple Access), FH-OFDM, CRSA(Conceptual Random Subcarrier Allocation), and HDD

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.7
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• pp.1328-1334
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• 2009

This paper presents a prediction mechanism of performance for an efficient interleave-division multiple access (IDMA) scheme that is being considered as 4th generation mobile radio system. The scheme is based upon log-likelihood ratio (LLR) to predict the performance of the IDMA. The conventional IDMA system simply passes the LLR values to a coarse estimation process in the receiver over a pre-defined number of iterations for an acceptable performance. The proposed IDMA system uses the LLRs to predict its BER performance and thus the iterative operation at the receiver can significantly be reduced when the performance attains an acceptable level. Performance evaluation shows that the proposed scheme of the IDMA with the LLRs used for the prediction provides a comparable BER performance. The use of the LLRs can facilitate an efficient design of the IDMA system that is a strong candidate system for 4G mobile radio systems.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.8
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• pp.1832-1838
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• 2009

In this paper, we present new signal de-interleaving method for the frequency agility radar in which the carrier frequency is changed irregularly. Generally radar use a fixed carrier frequency, and it is easy for electronic warfare system to de-interleave the radar signal with respect to the frequency, pulse width(PW), and direction of signal arriving(DOA). In frequency agility radar, it is difficult to de-interleave the radar signals according to the carrier frequency because the frequency is changed irregularly. We suggest a good de-interleaving method to identify the frequency agility radar signals in comparison with PRI's of radars. First we calculate pulse repeat Interval(PRI) of radar in linked-list and queue structure and de-interleave the radar signals with PRI, PW, and DOA, then identify the frequency agility radar. When we use the proposed algorism to the frequency agility radar, we have a good de-interleaving results with electronic warfare systems.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.12 no.1
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• pp.325-339
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• 2018

In this paper, we propose a joint adaptive combining and variable tap-length multiuser detector (MUD) for amplify-and-forward (AF) underwater acoustic cooperative interleave-division multiple access (IDMA) communication system. The proposed MUD jointly realizes tap-length adjustment, adaptive combining, and multiuser detection. In contrast to the existing methods, the proposed detector can adaptively combine the received signals from different nodes at destination, and does not need the assumption that full and perfect channel state information (CSI) of all the links at the receiver is known. Moreover, the proposed detector can adaptively adjust the tap coefficient vector and tap-length of each branch according to the specific channel profile of each branch. Simulation results validate the feasibility and show the advantages of the proposed detector against existing counterparts.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.4
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• pp.16-25
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• 1997

This paper shows a SDRAM opeating in 200MHz clock cycle which it use data interleave and pipelining for high speed operation. We proposed NdC (Negative DEaly circuit) to improve clock to access time(tAC) characteristics, also we proposed low power WL(wordline)driver circit and high efficiency VPP charge-pump circit. Our all circuits has been fabricated using 0.4um CMOS process, and the measured maximum speed is 200Mbytes/s in LvTTL interface.

• Journal of the Korea Convergence Society
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• v.9 no.4
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• pp.9-14
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• 2018

Recently, as the internet speed is getting faster, in the cloud environment, the service receiving device is changing from a general PC to a compact device such as a mobile phone or a tablet PC. Since handheld devices such as mobile phones or tablet PCs are often used in wireless rather than wired, there are many problems that personal information may be exposed maliciously from a third party. In this paper, we propose a user privacy protection scheme through a duplicate duplicate key generation process which can safely protect user 's privacy from third party among cloud services being served through various wireless media. The proposed scheme is used to synchronize the duplicated key between the server and the intermediary device, and aims at shortening the time of the authentication process protecting the user 's privacy. In this case, the proposed scheme uses Interleave() function and random number to synchronize the server and the intermediary device, so it can safely prevent the malicious attack of the third party.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.6
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• pp.51-58
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• 2002

In this paper, a 155/311 Mb/s MUX/DEMUX chip using ECL macrocell away has been developed with a single device. This device for a 2.5 Gb/s SDH based transmission system is to interleave the parallel data of 51 Mb/s into 155 Mb/s(or 311 Mb/s) serial data output, and is to interleave a serial input bit stream of 155 Mb/s(or 311 Mb/s) into the parallel output of 51 Mb/s. The input and output of the device ate TTL compatible at the low-speed end, but 100k ECL compatible at the high-speed end. The device has been fabricated with Motorola ETL3200 macrocell away The fabricated chip shows the typical phase margin of 180 degrees and output data skew less than 220ps at the high-speed end.