• 한국산학기술학회:학술대회논문집
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• 한국산학기술학회 2012년도 춘계학술논문집 2부
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• pp.512-516
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• 2012

Recently the Korean government's green energy growth policy has been taken at the national level due to the sufficient supply of renewable energy. Some specific technique should be taken in consideration for the operation of the grid voltage and power quality management. In this case, there may have some chance of operational problems. Typical problems arise when grid-connected solar power produced by Pacific sunshine. The power flow in the reverse direction can create overvoltage on the distribution line and gives value of malfunction on the system. Line voltage and overvoltage adjustment practice can stop these symptoms occurred. Under these circumstances, this paper presents an interconnection test devices for photovoltaic(PV) systems composed of distribution system simulator, PV system simulator and control and monitoring systems using the LabVIEW S/W, and simulates the customer voltage characteristics considering the 3 parameters on the introduction capacity for PV systems, system configuration and Power factor. This paper also proposes a new calculation algorithm for voltage profile to make comparison between calculation values and test device values. The results show that the simulation results for the normal operation characteristics of PV systems which are very practical and effective.

• 전기학회논문지
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• 제64권11호
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• pp.1543-1550
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• 2015

Ferroresonance is a non-linear vibrational phenomenon that is generated by the electrical interaction of the inductance component with the capacitor component of a certain capacitance as the device of the inductance component such as a transformer is saturated due to the degradation, the waveform distortion of current and voltage, and the oscillation of overcurrent and overvoltage in a system. Recently, ferroresonance was generated from the waveform distortion of current and voltage, or the overvoltage or undervoltage phenomenon caused by the nature of an electrical power system and design technology of the transformer in the three phase transformer system. Hence, in general, ferroresonance analyzed by converting to the LC equivalent circuit. However, in general, the aforementioned analytical method only applies to the resonance phenomenon that is generated by the interaction of the capacitance of bussbar and grounding, and switching as the capacitor component with PT and the transformer as the inductance component in a system. Subsequently, the condition where ferroresonance was generated since overvoltage was supplied as line voltage to the phase voltage and thus the iron core is saturated due to the interconnection between grounded and ungrounded systems could not be analyzed when single phase PT was connected in a ${\Delta}$/Y connection system. In this study, voltage swell in the configuration of grounded circuit of a step-up transformer with the ${\Delta}-{\Delta}$ connection linked to PT for control power and the ferroresonance generated by overvoltage when the line voltage of the ${\Delta}-{\Delta}$ connection was connected to the phase voltage of the grounded Y-Y connection were analyzed using PSCAD / EMTDC through the failure case of the transformer caused by ferroresonance in the system with the ${\Delta}-{\Delta}$/Y-Y connection, and subsequently, the preventive measure of ferroresonance was proposed.

• 한국통신학회논문지
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• 제25권5B호
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• pp.809-819
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• 2000

이 연구는 온라인 서비스를 제공하는 AICPS의 정합장치 용량 분배 및 성능을 분석하고자 한다. AICPS은 전화망, 패킷망, ISDN, 인터넷 및 프레임 릴레이망을 연동하는 게이트웨이 시스템이다. 기존의 PC통신망에 관한 연구는 전화망과 데이터망간 연동에 한정되어 있었고 사용자 이용성향도 고려하지 못했다. 따라서 이 연구에서는 앞으로 급격히 증가할 ISDN서비스를 반영하고 한번 호접속으로 PC통신, 인터넷을 동시에 이용할 수 있는 통신환경을 반영한 모형을 제시하였다. 이 모형에서는 사용자 이용성향은 마코프 과정을 이용해서 분석하였고 PC통신과 인터넷을 동시에 이용한는 경우에 호손율을 산출하기 위해 확률 배낭(Stochastic Knapsack) 방법을 이용하였다. 그리고 시뮬레이션을 통해 분석적 방법에 의한 분석과 비교하였다. 제안된 모형을 통해 전체의 호손율을 최소로 하는 AICPS의 망정합장치 용량을 배분할 수 있다.

• Journal of Electrical Engineering and Technology
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• 제12권1호
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• pp.11-18
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• 2017

In order to maintain customer voltages within the allowable limit($220{\pm}13V$) as much as possible, tap operation strategy of SVR(Step Voltage Regulator) which is located in primary feeder, is widely used for voltage control in the utilities. However, SVR in nature has operation characteristic of the delay time ranging from 30 to 150 sec, and then the compensation of BESS (Battery Energy Storage System) during the delay time is being required because the customer voltages in distribution system may violate the allowable limit during the delay time of SVR. Furthermore, interconnection of PV(Photovoltaic) system could make a difficultly to keep customer voltage within the allowable limit. Therefore, this paper presents an optimal coordination operation algorithm between BESS and SVR based on a conventional LDC (Line Drop Compensation) method which is decided by stochastic approach. Through the modeling of SVR and BESS using the PSCAD/EMTDC, it is confirmed that customer voltages in distribution system can be maintained within the allowable limit.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 A
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• pp.295-297
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• 2005

본 논문에서는 지금까지 각각 독립적으로 운전되었던 동북아시아(대한민국, 북한, 러시아) 전력시스템이 계통 연계를 통하여 얻을 수 있는 경제적 효과에 대한 평가 프로그램의 개발에 대하여 설명한다. 본 평가 프로그램의 목적는 향후 동북아 전력시스템의 계통 연계시 각 나라들의 발전소 건설 및 운용, 그리고 연계설비(Tie line)의 투자비용을 최소화할 수 있는 방안을 찾아 내는 것이다. 이를 통해 독립적으로 운전되는 것에 비해 계통연계를 통한 것이 보다 높은 경제적인 효과를 거둘 수 있음을 최종적으로 보이고자 한다. 문제를 좀 더 쉽고 빠르며 효과적으로 풀기 위하여 신규 발전설비와 연계선로에 대한 계획측면의 변수와 발전양와 선로에 흐르는 조류양의 제약 그리고 각 노드에서의 전력수급 조건 둥의 운전측면의 변수를 함께 포함시킨 선형 계획법 (LP, Linear Programming) 모델 로 정식화한 뒤 최적화 프로그램인 CPLEX를 통하여 해를 구한다.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2001년도 춘계학술대회 논문집
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• pp.1117-1120
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• 2001

Chemical mechanical planarization(CMP) has emerged as the planarization technique of choice in both front-end and back-end integrated circuit manufacturing. Conventional CMP process utilize a polyurethane polishing pad and liquid chemical slurry containing abrasive particles. There have been serious problems in CMP in terms of repeatability and defects in patterned wafers. Since IBM's official announcement on Copper Dual Damascene(Cu2D) technology, the semiconductor world has been engaged in a Cu2D race. Today, even after~3years of extensive R&D work, the End-of-Line(EOL) yields are still too low to allow the transition of technology to manufacturing. One of the reasons behind this is the myriad of defects associated with Cu technology. Especially, dishing and erosion defects increase the resistance because they decrease the interconnection section area, and ultimately reduce the lifetime of the semiconductor. Methods to reduce dishing & erosion have recently been interface hardness of the pad, optimization of the pattern structure as dummy patterns. Dishing & erosion are initially generated an uneven pressure distribution in the materials. These defects are accelerated by free abrasive and chemical etching. Therefore, it is known that dishing & erosion can be reduced by minimizing the abrasive concentration. Minimizing the abrasive concentration by using Ce$O_2$ is the best solution for reducing dishing & erosion and for removal rate. This paper introduce dishing & erosion generating mechanism and a method for developing a semi-rigid abrasive pad to minimize dishing & erosion during CMP.

• 대한전자공학회논문지SD
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• 제41권4호
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• pp.101-112
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• 2004

본 논문에서는 3차원 인터커넥트(3D interconnect) 구조를 해석하기 위하여 ADI-유한차분시간영역(ADI-FDTD: Alternating Direction Implicit Finite Difference Time Domain)법으로 맥스웰 회전 방정식(Maxwell's curl equation)을 계산하는 수치 해석 모델을 개발하였고, 개발한 ADI-유한차분시간영역법을 이용하여 3.3 V CMOS 기술로 설계된 샘플러 회로의 일부의 영역에 대해 컴퓨터 모의 실험 결과하여 입력된 구형 전압 신호가 금속 배선을 거치면서 5∼10 ps의 신호 지연과 0.1∼0.2 V의 신호 왜곡이 발생되는 것을 확인하였다. 결론적으로 ADI-유한차분시간영역법을 이용한 풀-웨이브 해석을 통하여 고속의 VLSI 인터커넥트에서의 전자기 현상을 정확하게 분석할 수 있음을 제시하였다.

• 전자공학회논문지A
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• 제31A권9호
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• pp.104-113
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• 1994

We have fabricated n-p-n HBTs using 3-inchAlgaAs/GaAs hetero structure epi-wafers grown by MBE. DC and AC characteristics of HBT devices were measured and analyzed. For HBT epi-structure, Al composition of emitter was graded in the region between emitter cap and emitter. And base layer was designed with concentration of 1${\times}10^{19}/cm^{3}$ and thickness of 50nm, and Be was used as the p-type dopant. Principal processes for device fabrication consist of photolithography using i-line stepper, wet mesa etching, and lift-off of each ohmic metal. The PECVD SiN film was used as the inslator for the metal interconnection. HBT device with emitter size of 3${\times}10{\mu}m^{2}$ resulted in cut-off frequency of 35GHz, maximum oscillation frequency of 21GHz, and current gain of 60. The distribution of the ideality factor of collector and base current was very uniform, and the average values of off-set voltage and current was very uniform, and the average values of off-set voltage and current gain were 0.32V and 32 within a 3-inch wafer.

• 한국통신학회논문지
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• 제19권7호
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• pp.1346-1363
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• 1994

패킷 음성 프로토콜은 지금까지 많이 연구되고 구현되어왔다. 하지만 음성통신을 위한 근거리 통신망과 사설교환기사이의 연동에 대한 연구는 아직 많은 편은 아니다. 본 논문에서는 근거리 통신망과 기존의 사설교환기사이의 음성통신을 위한 게이트웨이를 설계하고 구현하였다. 구현한 게이트웨이의 프로토콜은 CCITT의 G.764 패킷 음성 프로토콜을 수정. 사용하였다. 연동을 위한 하드웨어 시스템을 구현하였으며, 이는 전화선과의 인터페이스 부분, 음성처리부분, PC 인터페이스 부분 및 제어부분, 그리고 DTMF(Dual Tone Multiple Frequency) 접속부분으로 나누어진다. 그리고 소프트웨어는 근거리 통신망 접속용 네트웍카드를 구동하는 패킷 드라이버를 이용하기위한 인터페이스 부분과 게이트웨이를 구동하는 드라이버, 그리고 프로토콜 처리부분으로 구성되어있다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 추계학술대회 논문집 전력기술부문
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• pp.137-140
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• 2002

This paper describes the effect of distributed generations (DG) on the bus protection scheme. When the generating capacity of DG is larger than 3 MVA totally, DG are generally connected to the 22.9 kV bus directly with the dedicated line. Due to the fault current contribution of DG, the overcurrent protective relay that have conventional set value cannot detect the fault occurred in distribution power network with DG. Therefore. the impacts from interconnection of DG on the overcurrent protective relay for bus protection should be accurately assessed and mitigated. Simulation results show that it would be necessary to modify the overcurrent protective relay set value for protecting the bus according to the generating capacity of DG.