• Journal of KIISE:Computer Systems and Theory
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• v.37 no.6
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• pp.339-347
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• 2010

Inter-process communication (IPC), which is a technique that enables exchanging data among multiple processes, is commonly used not only in user applications but also in system processes. For this reason, the performance of IPC highly influences the performance of whole computer system. Especially, heavy overload on a single server process caused by IPC requests from multiple client processes, easily results overall slowdown of IPC response time. Here, to deal with the problem stated above, the time-slice donation technique which is adapted in L4 microkernel is analyzed and enhanced for reducing latency of IPC response time and implemented on linux kernel for actual performance evaluation. While trying to maintain the additional overhead as least as possible, the experiment shows that the use of this technique enhances the performance of IPC multiple times of existing technique under certain circumstances.

• Journal of the Korea Society for Simulation
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• v.6 no.2
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• pp.71-79
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• 1997

In this paper, operations system was designed for the centralization of data processing of various state information from the facilities of mobile communication network. And the system performance experimental system module was measured and analyzed from the designed experimental system module. The configuration of system design was presented with the centralized type to monite and control the facilities of mobile communication network in the central office. The communication process design of the internal system was implemented with the resource of message queue having a excellent transmission ability for processing of a great quantity of information in the inter-process communication among communication resources of UNIX system. The process with a server function from the internal communication processes was constructed with a single server or a double server according to the quantity of operations and implemented with the policy of the presented server. And then, we have measured performance elements in accordance with the change of input parameters from the designed experimental module : response time, waiting time, buffer length, the maximum quantity existing in message queue. And from these results, we have compared and analyzed the system state each server algorithm according to performance variations.

• Journal of the Korean Society for Precision Engineering
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• v.15 no.2
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• pp.35-44
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• 1998

This paper describes multiple fault diagnosis method in complex system with hierarchical structure. Complex system is divided into subsystem, item and component. For diagnosing this hierarchical complex system, it is necessary to implement special neural network. We introduced Modular Artificial Neural Network(MANN) for this purpose. MANN consists of four level neural network, first level for symptom classification, second level for item fault diagnosis, third level for component symptom classification, forth level for component fault diagnosis. Each network is multi layer perceptron with 7 inputs, 30 hidden node and 7 outputs trained by backpropagation. UNIX IPC(Inter Process Communication) is used for implementing MANN with multitasking and message transfer between processes in SUN workstation. We tested MANN in reactor system.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.10a
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• pp.397-400
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• 2016

In this paper, we propose an efficient algorithm for computing architecture for high-performance Inter Prediction SAD HEVC encoder. HEVC Motion Estimation (ME) of the Inter Prediction is a process for searching for the currently high prediction block PU and the correlation in the interpolated reference picture in order to remove temporal redundancy. ME algorithm uses full search(FS) or fast search algorithm. Full search technique has the guaranteed optimal results but has many disadvantages which include high calculation and operational time due to the motion prediction with respect to all candidate blocks in a given search area. Therefore, this paper proposes a new algorithm which reduces the computational complexity by reusing the SAD operation in full search to reduce the amount of calculation and computational time of the Inter Prediction. The proposed algorithm is applied to an HEVC standard software HM16.12. There was an improved operational time of 61% compared to the traditional full search algorithm, BDBitrate was decreased by 11.81% and BDPSNR increased by about 0.5%.

• Proceedings of the KSME Conference
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• 2005.11a
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• pp.189.1-189.1
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• 2005

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.13 no.2
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• pp.536-564
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• 2019

Soft faults are inherent in wireless sensor networks (WSNs) due to external and internal errors. The failure of processes in a protocol stack are caused by errors on various layers. In this work, impact of errors and channel misbehavior on process execution is investigated to provide an error classification mechanism. Considering implementation of WSN protocol stack, inter-process correlations of stacked and peer layer processes are modeled. The proposed model is realized through local and global decision trees for fault diagnosis. A hybrid framework is proposed to implement local decision tree on sensor nodes and global decision tree on diagnostic cluster head. Local decision tree is employed to diagnose critical failures due to errors in stacked processes at node level. Global decision tree, diagnoses critical failures due to errors in peer layer processes at network level. The proposed model has been analyzed using fault tree analysis. The framework implementation has been done in Castalia. Simulation results validate the inter-process correlation model-based fault diagnosis. The hybrid framework distributes processing load on sensor nodes and diagnostic cluster head in a decentralized way, reducing communication overhead.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.1
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• pp.112-117
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• 2016

This paper presents a half-rate current-integrating DFE receiver with sub-unit interval (sub-UI) inter-symbol interference (ISI) cancellation. By having a single additional DFE tap in each data path, the proposed DFE receiver can minimize BER degradation due to input pattern dependency and feedback tap latency problems in conventional current-integrating DFE receivers. The proposed DFE receiver was designed and fabricated in a 45 nm CMOS process, whose measurement results indicated that the BER bathtub width is increased from 0.235 UI to 0.315 UI (34% improvement) at $10^{-12}$ BER level.

• Proceedings of the Korean Operations and Management Science Society Conference
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• 2002.05a
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• pp.285-292
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• 2002

A cluster tool for semiconductor manufacturing is an integrated device that consists of several single wafer processing modules and a wafer transport module based on a robot. The distributed module controllers are integrated by an inter-module communication network and coordinated by a centralized controller, called a cluster tool controller (CTC). Since the CTC monitors and coordinates the distributed complex module controllers for advanced process control, complex commuication messaging and services between the CTC and the module controllers are required. A SEMI standard, CTMC(Cluster Tool Module Communication), specifies application-level communication service requirements for inter-module communication. We propose the use of high-level fieldbuses, for instance. PROFIBUS-FMS, for implementing CTMC since the high-level fieldbuses are well suited for complex real-time distributed manufacturing control applications. We present a way of implementing CTMC using PROFIBUS-FMS as the communication enabler. We first propose improvements of a key object of CTMC for material transfer and the part transfer protocol to meet the functional requirements of modem advanced cluster tools. We also discuss mapping objects and services of CTMC to PROFIBUS-FMS communication objects and services. Finally, we explain how to implement the mappings.

• Journal of Communications and Networks
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• v.15 no.5
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• pp.514-526
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• 2013

With a long sensing period, the inter-frame spectrum sensing in IEEE 802.22 standard is vulnerable to the effect of the traffic of the primary user (PU). In this article, we address the two degrading factors that affect the inter-frame sensing performance with respect to the random arrival/leaving of the PU traffic. They are the noise-only samples under the random arrival traffic, and the PU-signal-contained samples under the random leaving traffic. We propose the model in which the intra-frame sensing cooperates with the inter-frame one, and the inter-frame sensing uses the time-of-arrival (ToA), and time-of-leave (ToL) detectors to reduce the two degrading factors in the inter-frame sensing time. These ToA and ToL detectors are used to search for the sample which contains either the ToA or ToL of the PU traffic, respectively, which allows the partial cancelation of the unnecessary samples. At the final stage, the remaining samples are input into a primary user detector, which is based on the energy detection scheme, to determine the status of PU traffic in the inter-frame sensing time. The analysis and the simulation results show that the proposed scheme enhances the spectrum-sensing performance compared to the conventional counter-part.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.5
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• pp.33-38
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• 2016

In Android platform, as applications invoke various service functions through IPC (Inter-Process Communication), IPC performance is critical to the responsiveness in Android. However, Android offers long IPC latency of hundreds of micro-seconds due to complicated software stacks between the kernel Binder and the user-level process Context Manager. This separation provides modularity and flexibility, but degrades the responsiveness of services owing to additional context switching and inefficient request handling. In this paper, we anatomize Android IPC mechanisms and observe that 55% of IPC latency comes from the communication overhead between Binder and Context Manager. Based on this observation, this paper proposes a kernel Binder cache that retains a popular subset of service function mappings, thereby reducing the requests transferred to the user-level daemon. The proposed Binder cache is implemented in Android 5.0 and experimental results with various benchmarks show that the proposed cache architecture improves performance by 52.9% on average.