• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 추계학술대회 논문집 학회본부
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• pp.482-484
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• 1995

In designing three phase enclosure type EHV class gas insulated bus (GIB), it is essential to estimate the magnitude and the position where the maximum electric field strength occur. The improvement of insulation design can only be initiated after those informations have been obtained. In this paper, the calculated electric field strength for three phase GIB of HICO 362kV 63kA GIS is presented. The result shows that the designed insulator has enough margin compared with the design criteria.

• 한국전기전자재료학회논문지
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• 제20권2호
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• pp.135-141
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• 2007

The conduction-cooled HTS SMES is operated in cryogenic and high vacuum condition. Thus, Insulation design at cryogenic temperature and high vacuum is a key and an important element that should be established to accomplish miniaturization that is a big advantage of HTS SMES. However, the behaviors of insulators for cryogenic conditions in vacuum are virtually unknown. Therefore, we need active research and development of insulation concerning application of the conduction-cooled HTS SMES. Therefore, in this study, we experimented about insulation characteristic high vacuum and cryogenic similar to driving condition of SMES system. Also, investigated about insulation characteristic of suitable some materials to insulator for conduction-cooled HTS SMES. As this results, we possessed basis data for insulation materials selection and insulation design for development of 600 kJ class conduction-cooled HTS SMES.

• 센서학회지
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• 제21권2호
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• pp.114-120
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• 2012

This paper describes the design, fabrication and testing of a micromachined resonant accelerometer consisting of a symmetrical pair of proof masses and double-ended tuning fork(DETF) oscillators. Under the external acceleration along the input axis, the proof mass applies forces to the oscillators, which causes a change in their resonant frequency. This frequency change is measured to indicate the applied acceleration. Pivot anchor and leverage mechanisms are adopted in the accelerometer to generate larger force from a proof mass under certain acceleration, which enables increasing its scale factor. Finite element method analyses have been conducted to design the accelerometer and a silicon on insulator(SOI) wafer with a substrate glass wafer was used for fabricating it. The fabricated accelerometer has a scale factor of 188 Hz/g, which is shown to be in agreement with analysis results.

• 전기학회논문지
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• 제68권1호
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• pp.77-82
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• 2019

In this paper, a 0.6~6GHz quad-ridge horn antenna which can be used for the antenna measurement of 5.8GHz WiFi system from lowest frequency band of mobile LTE (Long Term Evolution) is designed and implemented. The quad-ridge horn antenna has quadruple ridges of exponential function, a back-short and a cavity. Based on this structure, we design the cavity size, ridge gap and feed gap to have broadband characteristics. For implementation, the plates material of aluminum and copper are used for the horn and four ridges, respectively. And the insulator supports are used to maintain the gap between ridges. By measurement, antenna has the gain of 6.2~13.35dBi with the return loss of less than -6dB (under VSWR 3 : 1) in the entire design band. The results of this study can be widely used to the antenna studies on the mobile communication including low frequency band of LTE, the EMI measurement and the standard calibration measurement.

• 한국추진공학회:학술대회논문집
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• 한국추진공학회 2010년도 제35회 추계학술대회논문집
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• pp.257-260
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• 2010

고체 추진기관 연소관 내열재의 숯 및 삭마 두께를 예측하기 위한 방법을 제시하였다. 내열재 두께를 계산하기 위해서는 열 및 구조 경계조건을 정확히 알아야 한다. 제안된 방법은 연소관에서 복사, 대류 및 $Al_2O_3$ 조건에서 내열 고무의 열분해 현상을 규명하는데 매우 유용하다. 간단하고 빠르게 고무계 내열재를 초기에 설계하기 위하여 단순화된 수식 과 실험이 사용되었다. 연소관 후방 돔 부위의 숯 및 삭마 두께를 예측하는데 이용이 가능하며 실제 연소 시험을 통하여 적용 가능성을 확인하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.31-32
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• 2010

In our previous reports [1-3], electron transport for the switching and memory devices using alkyl thiol-tethered Ru-terpyridine complex compounds with metal-insulator-metal crossbar structure has been presented. On the other hand, among organic memory devices, a memory based on the OFET is attractive because of its nondestructive readout and single transistor applications. Several attempts at nonvolatile organic memories involve electrets, which are chargeable dielectrics. However, these devices still do not sufficiently satisfy the criteria demanded in order to compete with other types of memory devices, and the electrets are generally limited to polymer materials. Until now, there is no report on nonvolatile organic electrets using nano-interfaced organic monomer layer as a dielectric material even though the use of organic monomer materials become important for the development of molecularly interfaced memory and logic elements. Furthermore, to increase a retention time for the nonvolatile organic memory device as well as to understand an intrinsic memory property, a molecular design of the organic materials is also getting important issue. In this presentation, we report on the OFET memory device built on a silicon wafer and based on films of pentacene and a SiO2 gate insulator that are separated by organic molecules which act as a gate dielectric. We proposed push-pull organic molecules (PPOM) containing triarylamine asan electron donating group (EDG), thiophene as a spacer, and malononitrile as an electron withdrawing group (EWG). The PPOM were designed to control charge transport by differences of the dihedral angles induced by a steric hindrance effect of side chainswithin the molecules. Therefore, we expect that these PPOM with potential energy barrier can save the charges which are transported to the nano-interface between the semiconductor and organic molecules used as the dielectrics. Finally, we also expect that the charges can be contributed to the memory capacity of the memory OFET device.[4]

• Journal of the Optical Society of Korea
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• 제18권3호
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• pp.261-273
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• 2014

In this paper, metal insulator metal (MIM) plasmonic slot cavity narrow band-pass filters (NBPFs) are studied. The metal and dielectric of the structures are silver (Ag) and air, respectively. To improve the quality factor and attenuation range, two novel NBPFs based on tapered structures and double cavity systems are proposed and numerically analyzed by using the two-dimensional (2-D) finite difference time domain (FDTD) method. The impact of different parameters on the transmission spectrum is scrutinized. We have shown that increasing the cavities' lengths increases the resonance wavelength in a linear relationship, and also increases the quality factor, and simultaneously the attenuation of the wave transmitted through the cavities. Furthermore, increasing the slope of tapers of the input and output waveguides decreases attenuation of the wave transmitted through the waveguide, but simultaneously decreases the quality factor, hence there should be a trade-off between loss and quality factor. However, the idea of adding tapers to the waveguides' discontinuities of the simple structure helps us to improve the device total performance, such as quality factor for the single cavity and attenuation range for the double cavity. According to the proposed NBPFs, two, three, and four-port power splitters functioning at 1320 nm and novel ultra-compact two-wavelength and triple-wavelength demultiplexers in the range of 1300-1550 nm are proposed and the impacts of different parameters on their performances are numerically investigated. The idea of using tapered waveguides at the structure discontinuities facilitates the design of ultra-compact demultiplexers and splitters.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 추계학술대회 논문집 전기물성,응용부문
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• pp.155-157
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• 2001

Various types suspension insulators made of toughness glass or porcelain are used in the power transmission. And, Insulators are continually subject to mechanical and electrical stresses which depend on the characteristics of the line. The main factor that influence the increase in reliability of insulators. In operation is the capacity of the design to withstand the certain load over a long time, the mechanical strength of the insulators. This paper describes the results of a study on the stress analysis of suspension insulator based on the finite element analysis using NASTRAN. And, the mechanical strength was evaluated through such as kinds of pin type.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2011년도 정기총회 및 추계학술대회 논문집
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• pp.1503-1510
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• 2011

The dropper length calculation method about the normal same encumbrance spans is well known independent to whether the pre-sag is given or not. But, the dropper length calculation method for the elevating span which consists in the end area of a tensioning section and normally consists with overlaps is not well known. In this study, firstly, we investigate the dropper length calculation method about the elevating span whether the insulator is contained in or not, we also recognize the effect of dropper length due to the change of the take-off point. Secondly, we very this calculation method with a catenary sample data and check again with Gyeongbu HSL design data.

• JSTS:Journal of Semiconductor Technology and Science
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• 제1권1호
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• pp.20-30
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• 2001

A 1.8V $650{\;}\textrm{mm}^2$ 4Gb DRAM having $0.10{\;}\mu\textrm{m}^2$ cell size has been successfully developed using 0.11 $\mu\textrm{m}$DRAM technology. Considering manufactur-ability, we have focused on developing patterning technology using KrF lithography that makes $0.11{\;}\mu\textrm{m}$ DRAM technology possible. Furthermore, we developed novel DRAM technologies, which will have strong influence on the future DRAM integration. These are novel oxide gap-filling, W-bit line with stud contact for borderless metal contact, line-type storage node self-aligned contact (SAC), mechanically stable metal-insulator-silicon (MIS) capacitor and CVD Al process for metal inter-connections. In addition, 80 nm array transistor and sub-80 nm memory cell contact are also developed for high functional yield as well as chip performance. Many issues which large sized chip often faces are solved by novel design approaches such as skew minimizing technique, gain control pre-sensing scheme and bit line calibration scheme.