• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.11 no.5
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• pp.97-102
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• 2012

In this paper, each electrical length and harmonics of the multi-stage SIR are calculated by using the input impedance for the variable application of SIR in the microwave systems. The size reduced ratio of the SIR is slightly reduced as increasing of the number of stage. The impedance ratio between lower and higher impedance of the SIR has the dominant effect on the size reduced ratio and harmonic characteristics. Also the equivalent impedance of the SIR is a geometric mean between lower and higher impedance and the quality factor of the SIR is similar to the half-wavelength resonator's.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.40 no.6
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• pp.68-77
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• 2003

An improved negative capacitance circuit that cancels out input impedance of a front-end in a bioimpedance measurement and operates stably with a low gain margin has been proposed. Since the proposed circuit comprises wide-band operational amplifiers, selecting operational amplifiers is easy, while an operational amplifier of prefer bandwidth should be chosen to apply conventional circuit. Also, since gain margin can be controlled by a feedback resistor connected serially with a feedback capacitor, gain margin is tuneable with a potentiometer. The input impedance of the proposed circuit is two times larger than that of the conventional circuit and 40-times than that without a negative capacitance circuit. Furthermore, closed-loop phase response of the proposed circuit is better than that of the conventional circuit or without a negative capacitance circuit. Above all, for the proposed circuit, the frequency at which a gain peaking occurs is higher than the frequency at which the loop gain becomes a maximum. Thus, the proposed circuit is not affected by a gain peaking and can be operated with a very low gain margin.

• Journal of electromagnetic engineering and science
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• v.17 no.4
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• pp.191-196
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• 2017

Microwave wireless power transmission (MWPT) is a promising technique for low and medium power applications such as wireless charging for sensor network or for biomedical chips in case with long ranges or in dispersive media such. A key factor of the MWPT technique is its efficiency, which includes the wireless power transmission efficiency and the radio frequency (RF) to direct current (DC) voltage efficiency of RF-DC converter (which transforms RF energy to DC supply voltage). The main problem in designing an RF-DC converter is the nonlinear characteristic of Schottky diodes; this characteristic causes low efficiency, higher harmonics frequency and a change in the input impedance value when the RF input power changes. In this paper, rather than using harmonic termination techniques of class E or class F power amplifiers, which are usually used to improve the efficiency of RF-DC converters, we propose a new method called "optimal input impedance" to enhance the performance of our design. The results of simulations and measurements are presented in this paper along with a discussion of our design concerning its practical applications.

• Journal of Sensor Science and Technology
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• v.21 no.1
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• pp.1-6
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• 2012

Using a current-mode multiple reset, a current-to-voltage(I-V) converter with a wide dynamic range was produced. The converter consists of a trans-impedance amplifier(TIA), an analog-to-digital converter(ADC), and an N-bit counter. The digital output of the I-V converter is composed of higher N bits and lower bits, obtained from the N-bit counter and the ADC, respectively. For an input current that has departed from the linear region of the TIA, the counter increases its digital output, this determines a reset current which is subtracted from the input current of the I-V converter. This current-mode reset is repeated until the input current of the TIA lies in the linear region. This I-V converter is realized using 0.35 ${\mu}m$ LSI technology. It is shown that the proposed I-V converter can increase the maximum input current by a factor of $2^N$ and widen the dynamic range by $6^N$. Additionally, the I-V converter is successfully applied to a photometric sensor.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.43 no.2
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• pp.118-124
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• 2015

The design of radar absorbing structures(RAS) is a discrete optimization problem and is usually processed by stochastic optimization methods. The calculation of radar cross section(RCS) should be decreased to improve the efficiency of designing RAS. In this paper, an efficient method using impedance matching is studied to design RAS for minimizing RCS. Input impedance of the minimal RCS for the specified wave incident conditions is obtained by interlocking physical optics(PO) and optimizations. Complex permittivity and thickness of RAS are designed to satisfy the calculated input impedance by a discrete optimization. The results reveal that the studied method attains the same results as stochastic optimization which have to conduct numerous RCS analysis. The efficiency of designing RAS can be enhanced by reducing the calculation of RCS.

• Journal of the Korean Institute of Telematics and Electronics
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• v.5 no.1
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• pp.13-25
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• 1968

A detailed analysis of the transistor wide-band feedback amplifiers using the hybrid-$\pi$ equivalent circuit has been made. It is considered both for the low freqnency and for the high frequency. The expressions of the gain, bandwidth. input impedance and output impedance have been presented. It is shown that a series feedback amplifier should be driven from the voltage source and should drive into the low resistance load, and a shunt feedback amplifier should be driven from the current source and should drive into the high resistance load. It is also shown that these stages can be coupled without use of the buffer stage or coupling transformer.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.12
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• pp.1228-1235
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• 2014

Input impedance of UHF RFID tag chip is needed to design a tag. In determining the chip impedance, direct measurement method is adopted commonly. In this paper, problems generated from fixtures that interface between tag chip and coaxial-oriented measurement instrument are investigated and the result of the problems is shown, when the direct measurement method is applied. As an alternative to the method, a modeling method is proposed and its validity and accuracy are shown.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.423-429
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• 2013

A 6-Gb/s differential voltage mode driver is presented whose output impedance and pre-emphasis level can be controlled independently. The voltage mode driver consists of five binary-weighted slices each of which has four sub-drivers. The output impedance is controlled by the number of enabled slices while the pre-emphasis level is determined by how many sub-drivers in the enabled slices are driven by post-cursor input. A prototype transmitter with a voltage-mode driver implemented in a 65-nm CMOS logic process consumes 34.8-mW from a 1.2-V power supply and its pre-emphasized output signal shows 165-mVpp,diff and 0.56-UI eye opening at the end of a cable with 10-dB loss at 3-GHz.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.1977-1978
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• 2008

In this paper, we compare performance of common-mode rejection between a differential and a non-differential amplifier system with two electrodes. A differential amplifier system is constant for common-mode rejection ratio(CMRR) on the frequency domain. But a non-differential amplifier's CMRR is determined by $Z_{FB}/Z_e$ ($Z_{FB}$ ; feedback impedance, $Z_e$; electrode impedance). There is trade-off between a non-differential amplifier's CMRR and its differential input impedance. And a non-differential amplifier system has some advantages for a bio-potential measurement with two electrodes because a designer can control the impedance between the body and system's common.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1571-1574
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• 2002

This paper describes a circuit and its operations of a programmable digital on-chip terminator designed with CMOS circuits which are used in high speed I/O interface. The on-chip terminator matches external reference resistor with the accuracy of ${\pm}$ 4.1％ over process, voltage and temperature variation. The digital impedance codes are generated in programmable impedance controller (PIC), and the codes are sent to terminator transistor arrays at input pads serially to reduce the number of signal lines. The transistor array is thermometer-coded to reduce impedance glitches during code update and it is segmented to two different blocks of thermometer-coded transistor arrays to reduce the number of transistors. The terminator impedance is periodically updated during hold time to minimize inter-symbol interferences.