• 제목/요약/키워드: Information input algorithm

검색결과 2,433건 처리시간 0.026초

A Square Root Normalized LMS Algorithm for Adaptive Identification with Non-Stationary Inputs

  • Alouane Monia Turki-Hadj
    • Journal of Communications and Networks
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    • 제9권1호
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    • pp.18-27
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    • 2007
  • The conventional normalized least mean square (NLMS) algorithm is the most widely used for adaptive identification within a non-stationary input context. The convergence of the NLMS algorithm is independent of environmental changes. However, its steady state performance is impaired during input sequences with low dynamics. In this paper, we propose a new NLMS algorithm which is, in the steady state, insensitive to the time variations of the input dynamics. The square soot (SR)-NLMS algorithm is based on a normalization of the LMS adaptive filter input by the Euclidean norm of the tap-input. The tap-input power of the SR-NLMS adaptive filter is then equal to one even during sequences with low dynamics. Therefore, the amplification of the observation noise power by the tap-input power is cancelled in the misadjustment time evolution. The harmful effect of the low dynamics input sequences, on the steady state performance of the LMS adaptive filter are then reduced. In addition, the square root normalized input is more stationary than the base input. Therefore, the robustness of LMS adaptive filter with respect to the input non stationarity is enhanced. A performance analysis of the first- and the second-order statistic behavior of the proposed SR-NLMS adaptive filter is carried out. In particular, an analytical expression of the step size ensuring stability and mean convergence is derived. In addition, the results of an experimental study demonstrating the good performance of the SR-NLMS algorithm are given. A comparison of these results with those obtained from a standard NLMS algorithm, is performed. It is shown that, within a non-stationary input context, the SR-NLMS algorithm exhibits better performance than the NLMS algorithm.

다상 DC-DC 컨버터의 입력 전류 리플 저감 제어 알고리즘 (Input Current Ripple Reduction Algorithm for Interleaved DC-DC Converter)

  • 주동명;김동희;이병국
    • 전력전자학회논문지
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    • 제19권3호
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    • pp.220-226
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    • 2014
  • Input current ripple and harmonic components of the power device are main causes of electromagnetic interference (EMI). Although the discontinuous conduction mode (DCM) operation can reduce harmonic components of the power device by reducing reverse recovery current of diode and turn-off voltage spikes of the switch, input current ripple increases due to high peak to peak inductor current. Therefore, in this paper, frequency control algorithm is proposed to reduce the input current ripple of DCM operated interleaved boost converter. In the proposed algorithm, duty ratio is fixed either 0.33 or 0.67 to minimize the input current ripple and the switching frequency is controlled according to operating conditions. 600 W 3-phase interleaved boost converter prototype system is built to verify proposed algorithm.

Convergence Control of Moving Object using Opto-Digital Algorithm in the 3D Robot Vision System

  • Ko, Jung-Hwan;Kim, Eun-Soo
    • Journal of Information Display
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    • 제3권2호
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    • pp.19-25
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    • 2002
  • In this paper, a new target extraction algorithm is proposed, in which the coordinates of target are obtained adaptively by using the difference image information and the optical BPEJTC(binary phase extraction joint transform correlator) with which the target object can be segmented from the input image and background noises are removed in the stereo vision system. First, the proposed algorithm extracts the target object by removing the background noises through the difference image information of the sequential left images and then controlls the pan/tilt and convergence angle of the stereo camera by using the coordinates of the target position obtained from the optical BPEJTC between the extracted target image and the input image. From some experimental results, it is found that the proposed algorithm can extract the target object from the input image with background noises and then, effectively track the target object in real time. Finally, a possibility of implementation of the adaptive stereo object tracking system by using the proposed algorithm is also suggested.

멀티플렉서 구조의 FPGA를 위한 BDD를 이용한 논리 합성 알고리듬 (Logic Synthesis Algorithm for Multiplexer-based FPGA's Using BDD)

  • 강규현;이재흥;정정화
    • 전자공학회논문지A
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    • 제30A권12호
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    • pp.117-124
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    • 1993
  • In this paper we propose a new thchnology mapping algorithm for multiplexer-based FPGA's The algorithm consists of three phases` First, it converts the logic functions and the basic logic mocule into BDD's. Second. it covers the logic function with the basic logic modules. Lastly, it reduces the number of basic logic modules used to implement the logic function after going through cell merging procedure. The binate selection is employed to determine the order of input variables of the logic function to constructs the balanced BDD with low level. That enables us to constructs the circuit that has small size and delay time. Technology mapping algorithm of previous work used one basic logic module to implement a two-input or three-input function in logic functions. The algorithm proposed here merges almost all pairs of two-input and three-input functions that occupy one basic logic module. and improves the mapping results. We show the effectiveness of the algorithm by comparing the results of our experiments with those of previous systems.

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입력단에 버퍼가 있는 라우터를 위한 일정계획 방안 (A Scheduling Algorithm for Input-Queued Switches)

  • 주운기;이형섭;이형호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 추계종합학술대회 논문집(1)
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    • pp.445-448
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    • 2000
  • This paper considers a scheduling algorithm for high-speed routers, where the router has an N x N port input-queued switch and the input queues are composed of N VOQ(Virtual Output Queue)s at each input port. The major concern of the paper is on the scheduling mechanism for the router. The paper discusses the preferred levels of the performance measures and then develope a non-linear mixed integer programming. Additionally, the paper suggests a heuristic scheduling algorithm for efficient and effective switching.

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LOS 알고리듬과 미지 입력 관측기에 기초한 선도-추종 대형 제어 (LOS (Line of Sight) Algorithm and Unknown Input Observer Based Leader-Follower Formation Control)

  • 윤석민;여태경;박성재;홍섭;김상봉
    • 제어로봇시스템학회논문지
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    • 제16권3호
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    • pp.207-214
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    • 2010
  • This paper proposes about decentralized control approach based Leader-Follower formation control using LOS (Line of Sight) algorithm and unknown input observer. The position of robots which is a basic information in multi-robot or single robot motion control is determined by localization algorithm fusing UPS (Ultrasonic Position System) and kinematics model. For formation control, a decentralized control approach individually installing a local controller in leader and follower robot is adopted. Leader robot is controlled to track a specified trajectory by LOS algorithm, and the other robots follow the leader by local controller based on tracking platoon level function, self-sensing data and estimated information from unknown input observer. The performance of proposed method is proven through the formation experiment of two vehicle models.

착용형 컴퓨터기반의 촉각 장치를 활용한 효율적인 정보 입력장치 및 개선된 입력 알고리즘 (An improved information input algorithm and information input device using Tactile devices based on wearable PC)

  • 신정훈;홍광석
    • 인터넷정보학회논문지
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    • 제6권5호
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    • pp.73-83
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    • 2005
  • 본 논문에서는 착용형 컴퓨터를 위한 촉각 사용자 인터페이스 및 이를 활용한 개선된 입력알고리즘을 제안한다. 유비쿼터스 환경의 도래에 따른 차세대 PC의 진화 방향은, 인간이 느끼는 색상, 빛의 밝기, 소리, 향기, 맛, 감촉 등의 오감정보의 효과적인 융합과 재현을 목표로, 사용자 중심의 인간-기계 관계의 형성으로 나아가고 있다. 그러나 이러한 기능의 다양함과는 별개로, H/W플랫폼의 진화 방향은 항상 휴대가 간편하도록 소형화, 경량화 및 착용화 형태로 개발되어지고 있다. 이러한 차세대 PC의 소형화 및 경량화 관련 진화에 가장 큰 걸림돌이 되는 부분은 사용자 입출력 장치로서, 기존의 키보드 및 모니터 등의 장치를 활용한 사용자 인터페이스에는 소형화의 한계가 존재하고 있는 실정이다. 본 논문에서는 이러한 소형화, 경량화 및 착용화를 위한 새로운 방법의 사용자 입력장치 및 입력알고리즘을 제안한다. 또한 기존에 제안되어진 유사 장치와의 비교 분석을 통한 제안시스템 및 알고리즘의 실효성을 평가한다.

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Rate Proportional SCFQ Algorithm for High-Speed Packet-Switched Networks

  • Choi, Byung-Hwan;Park, Hong-Shik
    • ETRI Journal
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    • 제22권3호
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    • pp.1-9
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    • 2000
  • Self-Clocked Fair Queueing (SCFQ) algorithm has been considered as an attractive packet scheduling algorithm because of its implementation simplicity, but it has unbounded delay property in some input traffic conditions. In this paper, we propose a Rate Proportional SCFQ (RP-SCFQ) algorithm which is a rate proportional version of SCFQ. If any fair queueing algorithm can be categorized into the rate proportional class and input is constrained by a leaky bucket, its delay is bounded and the same as that of Weighted Fair Queueing (WFQ) which is known as an optimal fair queueing algorithm. RP-SCFQ calculates the timestamps of packets arriving during the transmission of a packet using the current value of system potential updated at every packet departing instant and uses a starting potential when it updates the system potential. By doing so, RP-SCFQ can have the rate proportional property. RP-SCFQ is appropriate for high-speed packet-switched networks since its implementation complexity is low while it guarantees the bounded delay even in the worst-case input traffic conditions.

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비선형 시스템의 Dynamic Feedback을 이용한 합성 (Synthesis Problems of the Nonlinear Systems Via Dynamic Feedback)

  • 이홍기;전홍태
    • 전자공학회논문지B
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    • 제28B권12호
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    • pp.19-26
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    • 1991
  • In this paper, we give a structure algorithm for the synthesis problems of the nonlinear system via dynamic feedback. Using our algorithm, sufficient conditions for the input-output synthesis problems are discussed. The problems we consider in this paper include dynamic input-output decoupling input-output linearization, and immersion into a linear system.

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고밀도 광 기록 채널에서 17PP 변조 부호의 연판정 입력 연판정 출력 런-길이 제한 복호 알고리즘 (SISO-RLL Decoding Algorithm of 17PP Modulation Code for High Density Optical Recording Channel)

  • 이봉일;이재진
    • 한국통신학회논문지
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    • 제34권2C호
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    • pp.175-180
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    • 2009
  • 우수한 에러 정정 부호 기법인 LDPC(Low Density parity Check) 부호를 고밀도 광 기록 시스템에 적용하는 경우, 변조 부호 복호기는 연판정 채널 출력 검출기를 통과해 나온 정보 중에서 패리티 부분을 받아서 연판정 값을 출력해줘야 하는 알고리즘이 필요하다. 따라서 본 논문에서는 고밀도 광기록 채널에서 17PP 변조 부호에 대한 효과적인 연판정 입력 연판정 출력 런-길이 제한 부호의 복호 알고리즘을 제안하고, 이 때 LDPC 부호의 성능을 비교하였다. 그 결과 기존에 연구되었던 (1, 7) RLL을 이용한 연판정 입력 연판정 출력 복호 알고리즘 보다, 고밀도 광 기록 채널에서는, 제안한 17PP를 이용한 연판정 입력 연판정 출력 복호 알고리즘이 0.8dB 정도의 성능 이득이 있는 것을 알 수 있었다.