• Title/Summary/Keyword: Inductance variation

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Input Balun Design Method for CMOS Differential LNA (차동 저 잡음 증폭기의 입력 발룬 설계 최적화 기법)

  • Yoon, Jae-Hyuk
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.5
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    • pp.366-372
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    • 2017
  • In this paper, the analysis of baluns that are inevitably required to design a differential low noise amplifier, The balun converts a single signal input from the antenna into a differential signal, which serves as an input to the differential amplifier. In addition, it protects the circuit from ESD(Electrostatic Discharge) coming through the antenna and helps with input matching. However, in the case of a passive balun used in general, since the AC signal is transmitted through electromagnetic coupling formed between two metal lines, it not only has loss without gain but also has the greatest influence on the total noise figure of the receiving end. Therefore, the design of a balun in a low-noise amplifier is very important, and it is important to design a balun in consideration of line width, line spacing, winding, radius, and layout symmetry that are necessary. In this paper, the factors to be considered for improving the quality factor of balun are summarized, and the tendency of variation of resistance, inductance, and capacitance of the balun according to design element change is analyzed. Based on the analysis results, it is proved that the design of input balun allows the design of low noise, high gain differential amplifier with gain of 24 dB and noise figure of 2.51 dB.

Optimal Design of VCO Using Spiral Inductor (나선형 인덕터를 이용한 VCO 최적설계)

  • Kim, Yeong-Seok;Park, Jong-Uk;Kim, Chi-Won;Bae, Gi-Seong;Kim, Nam-Su
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.5
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    • pp.8-15
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    • 2002
  • We optimally designed the VCO(voltage-controlled oscillator) with spiral inductor using the MOSIS HP 0.5${\mu}{\textrm}{m}$ CMOS process. With the developed SPICE model of spiral inductor, the quality factor of spiral inductor was maximized at the operating frequency by varying the layout parameters, e.g., metal width, number of turns, radius, space of the metal lines. For the operation frequency of 2㎓, the inductance of about 3nH, and the MOSIS HP 0.5 CMOS process with the metal thickness of 0.8${\mu}{\textrm}{m}$, oxide thickness of 3${\mu}{\textrm}{m}$, the optimal width of metal lines is about 20${\mu}{\textrm}{m}$ for the maximum Quality factor. With the optimized spiral inductor, the VCO with LC tuning tank was designed, fabricated and measured. The measurements were peformed on-wafer using the HP8593E spectrum analyzer. The oscillation frequency was about 1.610Hz, the frequency variation of 250MHz(15%) with control voltage of 0V - 2V, and the phase noise of -108.4㏈c(@600KHz) from output spectrum.

Analysis and Measurement of the Magnetic Fields Cause by Operation of Electromotive Installations (전동력설비의 운전에 의해 발생되는 자계의 측정과 해석)

  • 이복희;길경석
    • The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.9 no.2
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    • pp.58-67
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    • 1995
  • The paper describes the variation of magnetic fields caused by the operation of induction motors. The measuring system consists of the self-integrating magnetic field sensor, amplifier, and active integrator. From the calibration experiments, the frequency bandwidth of the magnetic field measuring system ranges from 20[Hz] to 300[kHz] and sensitivity is 0.234(mV/$\mu\textrm{T}$]. The magnetic fields generated under steady state and starting operations of duction motor are recorded by the proposed measuring system, and the fast Fourier transformation(FFT) of the measured data is performed to analyze the harmonic components. A single pulsed magnetic field is strongly caused by direct starting the induction motor, and its peak value is greater than 5 times as compared with the steady state value. The long transient duration and high intensity originates from the large inductance and dynamic characteristic of the induction motor, During the steady state operation of induction motor, subharmonics of magnetic field components, which depend on the pole number of induction motor, are observed. The lower order power-line harmonics can be inferred from the voltage flicker and current ripple which are derived from the torque fluctuation of induction motor. In the case of the induction motor drived by inverter, the harmonics of magnetic field are much more than those caused by direct starting method and are found generally to increase with decreasing the driving frequency.

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Design of CMOS Multifunction ICs for X-band Phased Array Systems (CMOS 공정 기반의 X-대역 위상 배열 시스템용 다기능 집적 회로 설계)

  • Ku, Bon-Hyun;Hong, Song-Cheol
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.46 no.12
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    • pp.6-13
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    • 2009
  • For X-band phased array systems, a power amplifier, a 6-bit phase shifter, a 6-bit digital attenuator, and a SPDT transmit/receive (T/R) switch are fabricated and measured. All circuits are demonstrated by using CMOS 0.18 um technology. The power amplifier has 2-stage differential and cascade structures. It provides 1-dB gain-compressed output power ($P_{1dB}$) of 20 dBm and power-added-efficiency (PAE) of 19 % at 8-11 GHz frequencies. The 6-bit phase shifter utilizes embedded switched filter structure which consists of nMOS transistors as a switch and meandered microstrip lines for desired inductances. It has $360^{\circ}$ phase-control range and $5.6^{\circ}$ phase resolution. At 8-11 GHz frequencies, it has RMS phase and amplitude errors are below $5^{\circ}$ and 0.8 dB, and insertion loss of $-15.7\;{\pm}\;1,1\;dB$. The 6-bit digital attenuator is comprised of embedded switched Pi-and T-type attenuators resistive networks and nMOS switches and employes compensation circuits for low insertion phase variation. It has max. attenuation of 31.5 dB and 0.5 dB amplitude resolution. Its RMS amplitude and phase errors are below 0.4 dB and $2^{\circ}$ at 8-11 GHz frequencies, and insertion loss is $-10.5\;{\pm}\;0.8\;dB$. The SPDT T/R switch has series and shunt transistor pairs on transmit and receive path, and only one inductance to reduce chip area. It shows insertion loss of -1.5 dB, return loss below -15 dB, and isolation about -30 dB. The fabricated chip areas are $1.28\;mm^2$, $1.9mm^2$, $0.34\;mm^2$, $0.02mm^2$, respectively.