• Journal of Positioning, Navigation, and Timing
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• 제7권3호
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• pp.139-146
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• 2018

In recent years, a satellite navigation signal authentication technique has been introduced to determine the spoofing of commercial C/A code using the cross-correlation mode of GPS P(Y) code received at two receivers. This paper discusses the technical considerations in the implementation and application of authentication system simulator hardware to achieve the above technique. The configuration of the simulator consists of authentication system and user receiver. The synchronization of GPS signals received at two devices, data transmission and reception, and codeless correlation of P(Y) code were implemented. The simulation test result verified that spoofing detection using P(Y) codeless correlation could be achieved.

• 전자공학회논문지S
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• 제35S권3호
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• pp.19-28
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• 1998

This paper is concerned with the implementation of the equalization technique in a DCS 1800 system employing the soft-decision output Viterbi algorithm (SOVA), which makes the hardware complexity comparable to the hard decision MLSE and gives reliable performance. Also, the channel estimation technique with enhances the perfdormance of the soft-decision output equalizer is proposed, and the Viterbi decoder which operates effectively with the soft-decision output of the qualizer is implemented using the Very High Speed ICs Hardware Description Language (VHDL). From the simulation results, it is shown that the implemented Viterbi decoder operates effectively and the SOVA outperforms the hard-decision MLSE in terms of the frame erasure rate (FER) and bit error rate (BER).

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.1168-1171
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• 2009

We propose a low cost, high performance, effective overdrive implementation method for liquid crystal display systems. The technique can calculate all overdrive values using higher order approximation algorithm by only three measurements. We find that our technique can be applied regardless of LCD panels. Due to its simplicity, we can also tune motion performance of the LCD systems without measurements.

• 한국컴퓨터정보학회논문지
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• 제21권11호
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• pp.39-47
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• 2016

In this paper, we propose an approach for real time computation of rayleigh CLAHE using a FPGA. The contrast enhancement technique should be applied in thermal equipment having a low contrast image. And thermal equipment must be processed in real time. The CLAHE is an improved algorithm based Histogram Equalization, but the HW design is complex. A value greater than a given threshold in CLAHE should be equally distributed on the other histogram bin, this process requires iterations for the distribution. But implementation of this processing in the FPGA is constrained, so this section was implemented on the assumption of the histogram distribution or modified the operation process or implemented separately in the CPU. In this paper, we designed a distinct redistribution operation in two stages. So FPGA was designed for easy, this was designed to be distributed evenly without the assumptions and constraints. In addition, we have designed a CLAHE with the rayleigh distribution to the FPGA. The simulation shows that the proposed method provides a better image quality in the thermal image.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 전력전자학술대회 논문집
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• pp.189-190
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• 2015

This paper investigates an economic and highly efficient power converter topology and its modulation scheme for 60kW rapid EV charger system. The target system consists of three-phase three-switch buck-type rectifier topology. A new Carrier Based PWM scheme along with its simple implementation using logic gates is introduced in this paper. This PWM scheme replaces the diode rectifier equivalent switching state with an active switching state producing the effectively same current flowing path. As a result, the distortion of input current during the polarity reversal of capacitor line voltage can be mitigated. The proposed modulation technique is confirmed through simulation verification. The proposed modulation technique and its implementation scheme can expand the operation range of the three-phase three-switch buck-type rectifier having ac input and capacitor ripple current of high quality.

• 한국경영과학회:학술대회논문집
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• 대한산업공학회/한국경영과학회 1996년도 춘계공동학술대회논문집; 공군사관학교, 청주; 26-27 Apr. 1996
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• pp.200-203
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• 1996

Object-Oriented Modeling Technique (OMT) [1] promotes better understanding of requirements, cleaner designs, and more maintainable systems. A development of Group Decision Support System (GDSS) needs this advantage of OMT. GDSS designed through OMT proposes 3 modelings, object modeling, dynamic modeling, and functional modeling. This paper illustrates a design of GDSS using these 3 modelings. By exploiting the object-oriented paradigm, this design results in a highly system-independent design. And this paper shows some implementation issues including a tip of C++ code.

• 한국콘텐츠학회:학술대회논문집
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• 한국콘텐츠학회 2007년도 추계 종합학술대회 논문집
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• pp.193-196
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• 2007

최근 무선 통신 기술과 초소형화 기술의 진보로 지능형 센서 (smart sensor)를 이용한 무선 센서 네트워크의 구축이 가능해 졌으며 무선 센서 네트워크를 우리 생활 전반에 걸친 다양한 분야에 응용하려는 연구가 활발하게 진행되고 있다[1]. 본고에서는 무선 센서 네트워크의 응용분로서 무선센서노드를 활용한 캠퍼스 차량 관리 시스템 구축 방안에 대하여 기술하였다. 이를 위하여 무선센서노드의 전송전력제어 및 개별 노드 인식 방안을 고찰하였으며 실제 적용 시스템의 구성 및 동작 절차를 제안하였다.

• 전자공학회논문지A
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• 제32A권1호
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• pp.1-13
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• 1995

In this paper, a specification for wireless LAN MODEM using direct sequence spread spectrum (DS/SS) technique is presented. Some algorithms and hardware architectures for an efficient implementation of the DS/SS MODEM are suggested. In the method, all baseband signal processing are done digitally for single chip implementation. Schemes of DQPSK baseband modulation/demodulation, despreading with digital matched filter, digital timing recovery, and efficient carrier sensing are among the discussed algorithms. We also performed various kinds of simulations to evaluate the system performance and to extract parameters for hardware implementation. In addition, the pictorial view of ASIC of the SS MODEM is also shown.

• 전자공학회논문지B
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• 제30B권5호
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• pp.27-33
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• 1993

This paper describes the hardware implementation of 2-D FIR digital filter for a real-time image processing. Generally, the most time-consuming operation in signal processing is the multiplication operation. To avoid it in digital filter. Pelid and Liu proposed the distributed arithmetic method for the one-dimensional case. The implementation method proposed in this paper is to extend Pelid's method to two-dimensional FIR filter using simple ROM lookup table and to use the technique of pipe lining two main operations of memory access and arithmetic. As a result, the speed of our proposed hardware implementation is two times faster than that of conventional methods and can be close to the real time speed.

• 한국통신학회논문지
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• 제37권6B호
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• pp.414-422
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• 2012

본 논문에서는 초경량 대칭키 암호화 기법인 HUMMINGBIRD2 알고리즘을 센서 모트상에서의 최적화 구현기법을 제시한다. 효율적인 구현을 위해 센서보드상에 제공되는 레지스터의 활용을 극대화하며 최적화된 주소접근 기법을 적용하여 암복호화에 소요되는 시간을 최소화하였다. 해당 대칭키 암호화 구현기법을 통해 자원 한정적인 센서 상에서의 안전하고 효율적인 보안 통신이 가능하도록 한다.