• Title/Summary/Keyword: ITO patterning

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High performance of fully transparent amorphous In-Ga-Zn-O junctionless Thin-Film-Transistor (TFT) by microwave annealing

  • Lee, Hyeon-U;An, Min-Ju;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2015.08a
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    • pp.208.1-208.1
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    • 2015
  • 최근, 차세대 투명 디스플레이 구동소자로서 산화물 반도체를 이용한 Transparent Amorphous Oxide Semiconductor (TAOS) 기술이 큰 주목을 받고 있다. 산화물 반도체는 기존의 a-Si에 비해 우수한 전기적인 특성과 낮은 구동전압 그리고 넓은 밴드 갭으로 인한 투명성의 장점들이 있다. 그리고 낮은 공정 온도에서도 제작이 가능하기 때문에 유리나 플라스틱과 같은 다양한 기판에서도 박막 증착이 가능하다. 하지만 기존의 furnace를 이용한 열처리 방식은 낮은 온도에서 우수한 전기적인 특성을 내기 어려우며, 공정 시간이 길어지는 단점들이 있다. 따라서 본 연구에서는 산화물 반도체중 In-Ga-Zn-O (IGZO)와 In-Sn-O(ITO)를 각각 채널 층과 게이트 전극으로 이용하였다. 또한 마이크로웨이브 열처리 기술을 이용하여 기존의 열처리 방식에 비해 에너지 전달 효율이 높고 짧은 시간동안 저온 공정이 가능하며 우수한 전기적인 특성을 가지는 투명 박막 트랜지스터를 구현 하였다. 본 실험은 glass 기판위에서 진행되었으며, RF sputter를 이용하여 ITO를 150 nm 증착한 후, photo-lithography 공정을 통하여 하부 게이트 전극을 형성하였다. 이후에 RF sputter를 이용하여 SiO2 와 IGZO 를 각각 300, 50 nm 증착하였고, patterning 과정을 통하여 채널 영역을 형성하였다. 또한 소자의 전기적인 특성 향상을 위해 마이크로웨이브 열처리를 1000 Watt로 2 분간 진행 하였고, 비교를 위하여 기존 방식인 furnace 를 이용하여 N2 분위기에서 $400^{\circ}C$로 30분간 진행한 소자도 병행하였다. 그 결과 마이크로웨이브를 통해 열처리한 소자는 공정 온도가 $100^{\circ}C$ 이하로 낮기 때문에 glass 기판에 영향을 주지 않고 기존 furnace 열처리 한 소자보다 전체적으로 전기적인 특성이 우수한 것을 확인 하였다.

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Organic Thin-Film Transistors Fabricated on Flexible Substrate by Using Nanotransfer Molding

  • Hwang, Jae-Kwon;Dang, Jeong-Mi;Sung, Myung-Mo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.287-287
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    • 2010
  • We report a new direct patterning method, called liquid bridge-mediated nanotransfer molding (LB-nTM), for the formation of two- or three-dimensional structures with feature sizes between tens of nanometers and tens of micron over large areas. LB-nTM is based on the direct transfer of various materials from a mold to a substrate via a liquid bridge between them. This procedure can be adopted for automated direct printing machines that generate patterns of functional materials with a wide range of feature sizes on diverse substrates. Arrays of TIPS-PEN TFTs were fabricated on 4" polyethersulfone (PES) substrates by LB-nTM using PDMS molds. An inverted staggered structure was employed in the TFT device fabrication. A 150 nm-thick indium-tin oxide (ITO) gate electrode and a 200 nm-thick SiO2dielectric layer were formed on a PES substrate by sputter deposition. An array of TIPS-PEN patterns (thickness: 60 nm) as active channel layers was fabricated on the substrate by LB-nTM. The nominal channel length of the TIPS-PEN TFT was 10 mm, while the channel width was 135 mm. Finally, the source and drain electrodes of 200 nm-thick Ag were defined on the substrate by LB-nTM. The TIPS-PEN TFTs can endure strenuous bending and are also transparent in the visible range, and therefore potentially useful for flexible and invisible electronics.

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High-performance photovoltaics by double-charge transporters using graphenic nanosheets and triisopropylsilylethynyl/naphthothiadiazole moieties

  • Agbolaghi, Samira;Aghapour, Sahar;Charoughchi, Somaiyeh;Abbasi, Farhang;Sarvari, Raana
    • Journal of Industrial and Engineering Chemistry
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    • v.68
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    • pp.293-300
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    • 2018
  • Reduced graphene oxide (rGO) nanosheets were patterned with poly[benzodithiophene-bis(decyltetradecyl-thien) naphthothiadiazole] (PBDT-DTNT) and poly[bis(triiso-propylsilylethynyl) benzodithiophene-bis(decyltetradecyl-thien) naphthobisthiadiazole] (PBDT-TIPS-DTNT-DT) and used in photovoltaics. Conductive patternings changed via surface modification of rGO; because polymers encountered a high hindrance while assembling onto grafted rGO. The best records were detected in indium tin oxide (ITO):poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) (PEDOT:PSS):PBDTDTNT/rGO:PBDT-DTNT:LiF:Al devices, i.e., short current density $(J_{sc})=11.18mA/cm^2$, open circuit voltage $(V_{oc})=0.67V$, fill factor (FF) = 62% and power conversion efficiency (PCE) = 4.64%. PCE increased 2.31 folds after incorporation of PBDT-DTNT into thin films. Larger polymer assemblies on bared-rGO nanosheets resulted in greater phase separations.

Improvement of Electrical Characteristics in Double Gate a-IGZO Thin Film Transistor

  • Lee, Hyeon-U;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.311-311
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    • 2016
  • 최근 고성능 디스플레이 개발이 요구되면서 기존 비정질 실리콘(a-Si)을 대체할 산화물 반도체에 대한 연구 관심이 급증하고 있다. 여러 종류의 산화물 반도체 중 a-IGZO (amorphous indium-gallium-zinc oxide)가 높은 전계효과 이동도, 저온 공정, 넓은 밴드갭으로 인한 투명성 등의 장점을 가지며 가장 연구가 활발하게 보고되고 있다. 기존에는 SG(단일 게이트) TFT가 주로 제작 되었지만 본 연구에서는 DG(이중 게이트) 구조를 적용하여 고성능의 a-IGZO 기반 박막 트랜지스터(TFT)를 구현하였다. SG mode에서는 하나의 게이트가 채널 전체 영역을 제어하지만, double gate mode에서는 상, 하부 두 개의 게이트가 동시에 채널 영역을 제어하기 때문에 채널층의 형성이 빠르게 이루어지고, 이는 TFT 스위칭 속도를 향상시킨다. 또한, 상호 모듈레이션 효과로 인해 S.S(subthreshold swing)값이 낮아질 뿐만 아니라, 상(TG), 하부 게이트(BG) 절연막의 계면 산란 현상이 줄어들기 때문에 이동도가 향상되고 누설전류 감소 및 안정성이 향상되는 효과를 얻을 수 있다. Dual gate mode로 동작을 시키면, TG(BG)에는 일정한 positive(or negative)전압을 인가하면서 BG(TG)에 전압을 가해주게 된다. 이 때, 소자의 채널층은 depletion(or enhancement) mode로 동작하여 다른 전기적인 특성에는 영향을 미치지 않으면서 문턱 전압을 쉽게 조절 할 수 있는 장점도 있다. 제작된 소자는 p-type bulk silicon 위에 thermal SiO2 산화막이 100 nm 형성된 기판을 사용하였다. 표준 RCA 클리닝을 진행한 후 BG 형성을 위해 150 nm 두께의 ITO를 증착하고, BG 절연막으로 두께의 SiO2를 300 nm 증착하였다. 이 후, 채널층 형성을 위하여 50 nm 두께의 a-IGZO를 증착하였고, 소스/드레인(S/D) 전극은 BG와 동일한 조건으로 ITO 100 nm를 증착하였다. TG 절연막은 BG 절연막과 동일한 조건에서 SiO2를 50 nm 증착하였다. TG는 S/D 증착 조건과 동일한 조건에서, 150 nm 두께로 증착 하였다. 전극 물질과, 절연막 물질은 모두 RF magnetron sputter를 이용하여 증착되었고, 또한 모든 patterning 과정은 표준 photolithography, wet etching, lift-off 공정을 통하여 이루어졌다. 후속 열처리 공정으로 퍼니스에서 질소 가스 분위기, $300^{\circ}C$ 온도에서 30 분 동안 진행하였다. 결과적으로 $9.06cm2/V{\cdot}s$, 255.7 mV/dec, $1.8{\times}106$의 전계효과 이동도, S.S, on-off ratio값을 갖는 SG와 비교하여 double gate mode에서는 $51.3cm2/V{\cdot}s$, 110.7 mV/dec, $3.2{\times}108$의 값을 나타내며 훌륭한 전기적 특성을 보였고, dual gate mode에서는 약 5.22의 coupling ratio를 나타내었다. 따라서 산화물 반도체 a-IGZO TFT의 이중게이트 구조는 우수한 전기적 특성을 나타내며 차세대 디스플레이 시장에서 훌륭한 역할을 할 것으로 기대된다.

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Nano-fabrication of Superconducting Electrodes for New Type of LEDs

  • Huh, Jae-Hoon;Endoh, Michiaki;Sato, Hiroyasu;Ito, Saki;Idutsu, Yasuhiro;Suemune, Ikuo
    • Proceedings of the Optical Society of Korea Conference
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    • 2009.02a
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    • pp.133-134
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    • 2009
  • Cold temperature development (CTD) of electron beam (EB) patterned resists and subsequent dry etching were investigated for fabrication of nano-patterned Niobium (Nb). Bulky Nb fims on GaAs substrates were deposited with EB evaporation. Line patterns on Nb cathode were fabricated by EB patterning and reactive ion etching (RIE). Size deviations of nano-sized line patterns from CAD designed patterns are dependent on the EB total exposure, but it can be improved by CTD of EB-exposed resist. Line patterns of 10 to 300 nm widths of EB-exposed resist patterns were drawn under various exposure conditions of $0.2{\mu}s$/dot (total 240,000 dot) with a constant current (50 pA). Compared with room temperature development (RTD), the CTD improves pattern resolution due to the suppression of backscattering effect. RIE with $CF_4$ was performed for formation of several nano-sized line patterns on Nb. Each EB-resist patterned samples with RTDs and CTDs were etched with two different $CF_4$ gas pressures of 5 Pa. Nb etching rate increases while GaAs (or ZEP) etching rate decreases as the chamber pressure increases. This different dependent of the etching rate on the $CF_4$ pressure between Nb and GaAs (or ZEP) has a significant meaning because selective etching of nano-sized Nb line patterns is possible without etching of the underlying active layer.

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A Study on the Optical Characteristics of Multi-Layer Touch Panel Structure on Sapphire Glass (Sapphire Glass 기반 다층박막 터치패널구조의 광학특성 연구)

  • Kwak, Young Hoon;Moon, Seong Cheol;Lee, Ji Seon;Lee, Seong Eui
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.29 no.3
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    • pp.168-174
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    • 2016
  • A conductive oxide-based sapphire glass indium tin oxide/metal electrode and the optical coating, through patterning process was studied in excellent optical properties and integrated touch panel has a high strength. Indium tin oxide conductive oxides of the sapphire glass to 0.3 A at DC magnetron sputtering method of 10 min, gas flow Ar 10 Sccm Ar, $O_2$ 1.0 Sccm the formation conditions of the thin film after annealing at $550^{\circ}C$ for 30min was achieved through a 86% transmittance. In addition, the coating 130 nm hollow silica sol-gel was to improve the optical transmittance of the indium tin oxide to 91%. For the measurement by the modeling hollow silica sol by Macleod simulation and calculated the average values of silica part to the presence or absence in analogy to actual. Refractive index value and the actual value of the material on the simulation the transmittance difference is it does not completely match the air region similar to the actual value (transmission) could be confirmed that the measurement is set to a value of between 5 nm and 10 nm.

Development of Uniform Ag Electrode and Heating Sensors Using Inkjet Printing Technology (잉크젯 프린팅 기술을 이용한 Ag 전극 균일성 및 발열 센서 연구)

  • Gun Woong Kim;Jaebum Jeong;Jin Ho Park;Woo Jin Jeong;Jun Young Kim
    • Journal of Sensor Science and Technology
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    • v.33 no.1
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    • pp.24-29
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    • 2024
  • Inkjet printing technology is used to mass-produce displays and electrochemical sensors by dropping tens of pico-liters or less of specific-purpose ink through nozzles, just as ink is sprayed and printed on paper. Unlike the deposition method for vaporizing material in a vacuum, inkjet printing technology can be used for processing even under general atmospheric pressure and has a cost advantage because the material is dissolved in a solvent and used in the form of ink. In addition, because it can only be printed on the desired part, masks are not required. However, a technical shortcoming is the difficulty for commercialization, such as uniformity for forming the thickness and coffee ring effect. As sizes of devices decrease, the need to print electrodes with precision, thinness, and uniformity increases. In this study, we improved the printing and processing conditions to form a homogeneous electrode using Ag ink (DGP-45LT-15C) and applied this for patterning to fabricate a heat sensor. Upon the application of voltage to the heat sensor, the model with an extended width exhibited superior heat performance. However, in terms of sheet resistance, the model yielded an equivalent value of 21.6 Ω/□ compared to the ITO.

Electro-optic characteristics of novel biased vertical alignment device using the polymerized reactive mesogen (광경화성 단분자를 이용한 새로운 수직배향 액정 디바이스의 전기 광학적 특성연구)

  • Kim, Dae-Hyun;Kim, Sung-Min;Cho, In-Young;Kim, Woo-Il;Kwon, Dong-Won;Son, Jong-Ho;Ryu, Jae-Jin;Kim, Kyeong-Hyeon;Lee, Seung-Hee
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.269-270
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    • 2009
  • The biased vertical alignment (BVA) liquid crystal (LC) mode shows a has a distinct advantage of lower manufacture cost due to the elimination of a lithographic process step to form either ITO-patterning or protrusions on the color-filter substrates. However, those devices have complex voltage conditions which is the respective induce voltage on common electrode, pixel electrode and bias electrode when positive and negative frame. In order to overcome the complex voltage condition, the pretilt angles is controlled by photo polymerization of the UV-curable reactive mesogen (RM). According to our studies, voltages to the cell are critical to achieve an optimized surface-modified quality BVA (Q-BVA) mode which provides the well defined reorientation of the LCs with respect to an electric field.

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