• Title/Summary/Keyword: ISI(inter-symbol interference)

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Measurement of Peak-to-Average Power Ratio for HRIT

  • Park Durk-Jong;Yang Hyung-Mo;Ahn Sang-Il
    • Proceedings of the KSRS Conference
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    • 2004.10a
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    • pp.498-500
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    • 2004
  • QPSK (Quaternary Phase Shift Keying) will be adopted as the modulation of HRIT (High Rate Information Transmission) which is transmitted to COMS (Communication, Ocean and Meteorological Satellite) through HPA (High Power Amplifier) in ground segment. Due to the nonlinearity of HPA, IMD (Inter-Modulation Distortion) of multi-carrier signals and PAPR (Peak-to-Average Power Ratio) of modulated HRIT must be considered to estimate the output power of HPA. In this paper, we measured the PAPR to various the roll-off factor of RRC (Root Raised Cosine filter) which is filtering the modulated HRIT signal for reducing ISI (Inter-Symbol Interference) and bandwidth. It was found that the minimum PAPR is 2.78dB at 0.5 of roll-off factor for scrambled data. It's 2.78dB of P APR will be in output power selecting in COMS earth station.

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An Adaptive Linear Channel Equalizer Using Asymmetric Transversal Filter (비대칭 필터 구조를 이용한 적응형 선형 채널 등화기)

  • Han, Jong-Young;Lim, Dong-Guk;Kim, Jae-Moung
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.9A
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    • pp.830-837
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    • 2005
  • ISI is caused by delay spread in the multipath channel environment. There are two kinds of channel equalizer: Linear and Non-Linear type according to the structures. In this paper, we propose an improved adaptive linear equalizer to mitigate ISI. The proposed adaptive equalizer is constructed by using asymmetrical Dsmvenu filter based on USE sub-optimal receiver. Asymmetrical structure of the transversal filter is realized by moving the main tap position from center to side. If this structure is used, we can divide ISI to precusor and postcusor. As a result the proposed equalizer has a larger extended compensation range than conventional adaptive linear equalizer. In computer simulation, we compare the bit error rate performance of the proposed linear equalizer with the conventional one on the S-V channel which is modeled for WB systems.

Design of Equalizer using Fussy Stochastic Gradient Algorithm (퍼지 확률 기울기 알고리즘을 이용한 등화기 설계)

  • Park, Hyoung-Keun;Ra, Yoo-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.9 no.1
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    • pp.152-159
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    • 2005
  • For high-speed data communication in band-limited channels, main of the bit error are fading and ISI(Inter-Symbol Interference). The common way of dealing with ISI is using equalization in the receiver. In this thesis, channel adaptive equalizer which uses Fuzzy Stochastic Gradient(FSG) and Constant Modulus Algorithm(CMA) is nonlinear equalizer, or Blind equalizer, that works directly on the signals with no training sequences required. This equalizer employs Takagi-Sugeno's fuzzy model that uses the FSG algorithm, to automatically regulate the step size of the descent gradient vector, combining fast convergence rate and low mean square error(MSE), and the CMA which is a special case of Godard's algorithm, to having multiple dispersion constants($R_p$).

A Study on the Frequency Detection of PRCPM Signals Using the DFE Scheme in Fast Fading Channels (고속 페이딩 채널에서 DFE 기법을 적용한 PRCPM신호의 주파수 검파에 관한 연구)

  • 박길재;강민구;김종일;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.16 no.5
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    • pp.413-423
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    • 1991
  • Some digital partical response continuous phase modulation signals such as 3RC, 3SRC, 4SRC, and TFM have cconstant envelope characteristics and compact power spectra. However, their bit error rates in fast fading environments are too high when a simple frequency detection is used. This is due to high inter symbol interference resulting from adjacent bits. The improvement of BER performance by using DFE(Decision Feedback Equalization) to cancel the ISI of one adjacent bit is theoretically investigated in this paper. Numerical resuls are presentes to compare the BER performance of frequency detection with and without decision feedback equalization.

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A Design of IFFT Processor for Reducing OFDM Transmitter Latency (OFDM 송신단의 지연을 줄이기 위한 IFFT Processor의 설계)

  • Kim, Jun-Woo;Park, Youn-Ok;Kim, Whan-Woo
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.12C
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    • pp.1167-1176
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    • 2009
  • In This Paper, we introduce an efficient IFFT design technique named for transmitter of OFDM (Orthogonal Frequency Division Multiplexing) system. In OFDM system, a cyclic prefix is inserted in forepart of OFDM symbol to prevent ICI(Inter-channel Interference) and ISI (Inter-symbol Interference). Attaching cyclic prefix causes delay in storing and copying IFFT result. The proposed IFFT removes this delay because its output is cyclic shifted by the length of cyclic prefix. So we can make a complete OFDM symbol by just copying the forepart of IFFT output to the end. In many cases, the length of cyclic prefix is 1/2n of FFT size, and this IFFT does not require additional hardware complexity and it does not cause any performance degradation.

An 8-Gb/s/channel Asymmetric 4-PAM Transceiver with an Adaptive Pre-emphasis for Memory Interface (메모리 인터페이스를 위한 적응형 프리엠퍼시스를 가지는 8-Gb/s/채널 비균형 4-레벨 펄스진폭변조 입출력회로)

  • Jang, Young-Chan;Jun, Young-Hyun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.8
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    • pp.71-78
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    • 2009
  • An 8${\times}$8-Gb/s/channel 4-PAM transceiver was designed for high speed memory applications by using 70nm DRAM process with 1.35V supply. An asymmetric 4-PAM signaling scheme is proposed to increase the voltage and time margin of upper and lower eyes in 3-class eye opening. A mathematical basis shows that this scheme statistically reduces 33% of reference noise effect in a receiver. Also, an adaptive pre-emphasis scheme, which utilizes a lone-bit pulse with integrator at the receiver, is introduced to reduce ISI for a simple DRAM channel. In this scheme, an integrating clock timing calibration by using a pre-determined pattern is proposed for the optimum ISI measurement.

Performance of VLC-CDMA Communication System Using LED (LED를 이용한 VLC-CDMA 통신 시스템 성능 분석)

  • Bae, Su-Jin;Hong, Yeong-Jo;Lee, Kye-San
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.8 no.2
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    • pp.83-90
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    • 2009
  • White LEDs(Light Emitting Diode) offer advantageous properties such as high brightness, improved reliability, lower power consumption, and long lifetimes. An LED is an electronic device that converts an electrical signal into a tight signal and is used not only in Optical Communication Indoor wireless optical illuminating rooms, but also for wireless optical communication systems. Currently, studies about these white LEDs have been being progressed, and in this raper, we discuss the multiplex and the multiple access method of VLC(Visible Light Communication) systems using white LEDs. In proposed system, CDMA(Code Division Multiple Access) apples to VLC system to reduce interference of VLC system, and improve capacity. The superiority of OOK modulation is presented in analysis of results by comparing VLC-CDMA communication system using OOK(On-off keying) modulation and BPSK modulation in AWGN(Additive White Gaussian Noise) channel and Diffuse channel. And we investigate the significance of a solution of interference by multipath by comparing BER in multipath channel and AWGN channel. In the proposed system, we assume Directed LOS(Line Of Sight) and Diffuse Link, and suppose VLC-CDMA using OOC(Optical Orthogonal Code) as methods to increase efficiency of system by removing ISI(Inter Symbol Interference) caused by multiple access, optical spreading code, and also present an analysis of its performance.

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Design and FPGA Implementation of 5㎓ OFDM Modem for Wireless LAN (5㎓대역 OFDM 무선 LAM 모뎀 설계 및 FPGA 구현)

  • Moon Dai-Tchul;Hong Seong-Hyub
    • Journal of the Institute of Convergence Signal Processing
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    • v.5 no.4
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    • pp.333-337
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    • 2004
  • This paper describe a design of 5GHz OFDM baseband chip for IEEE 802.11a wireless LAN. The proposed device is consists of transmitter and receiver within a single FPGA chip. We applied single tap equalizer that use Normalized LMS algorithm to remove ISI that happen at high speed data transmission. And also, we used carrier wave frequency offset algorithm that use training symbol to remove ICI. The simulation results show the correct transmission without errors the between transmitter and receiver And we can remarkably reduce the number of register through the synthesized circuits by using DSP block and EMB(Embedded Memory Block). The target device for implementation of the synthesized circuits is Altera Stratix EPIS25FC672 FPGA and design platform is VHDL.

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An Iterative Two-Dimensional Equalizer for Bit Patterned Media Storage Systems Based on Contraction Mapping (비트 패턴 미디어 저장장치를 위한 축약사상 기반의 반복적 2차원 등화기)

  • Moon, Woosik;Im, Sungbin;Park, Sehwang
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.6
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    • pp.3-8
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    • 2013
  • Bit patterned media (BPM) storage is one of the promising technologies to overcome the limitations of the conventional magnetic recording. However, there are some problems in a high areal density BPM storage, inter-track interference, inter-symbol interference and noise which are severely degrading performance of the system with reducing the bit error rate. In this paper, we present a simple iterative two-dimensional equalizer based on the contraction mapping theorem to mitigate these adverse effects. Furthermore, we examine that the channel characteristics of the proposed two-dimensional equalizer satisfies the convergence conditions. In the simulation we demonstrate the bit separation characteristics of the one-dimensional equalizer and the two-dimensional equalizer and evaluate the BER performance of the proposed equalizer comparing with the conventional equalizers. According to the results of experiments, the proposed equalizer is an promising equalizer with maintaining proper complexity for a high areal density BPM storage.

Performance Analysis of WFMT Modulation System Robust to ICI and Doppler Effect (부반송파간 간섭과 도플러 효과에 강한 WFMT 변조 방식의 성능 분석)

  • Kim, Seon-Ae;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.10
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    • pp.1137-1146
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    • 2008
  • OFDM is very effective for the high speed communication system. However, OFDM has the problems of high PAPR and serious ICI, which is different from the single carrier system. Especially, ICI problem caused by phase noise, Doppler effect and frequency offset is main reason for poor performance since it breaks down the orthogonality between subcarriers in OFDM communication system. Therefore, WFMT modulation scheme is studied and the effect of the carrier frequency offset and phase noise is analyzed. WFMT modulation scheme is based on the wavelet theory and complex filter banks for synthesis and analysis of multichannel signal. WFHT modulation scheme keeps on the advantage of filter banks system and can be easily possible for the implementation of filter banks. In this paper, we compare ISI and ICI distortions of the WFMT and OFDM system due to the carrier frequency offset and phase noise. Also, we analyze the PAPR and BER performances in the HPA and ICI situation caused by the Doppler frequency shift and the frequency offset.