• The Journal of Information Systems
• /
• v.17 no.1
• /
• pp.155-171
• /
• 2008

This thesis proposed a method that connecting step motor to image send board which can acquire image to move and remote controlling via streaming image board of PDA(personal digital assistant) based on embedded Linux which is using wireless network There are three embedded Linux system to embody movable image send board. First, though the wireless network a signal of PDA is transmitted to the board which has embedded Linux and a system which is controlled by the expansion I/O port of the board. Second, it's a system streaming realtime image at a PDA which has embedded Linux. The last is a system which controls a process of image board using TCP/IP communication and image send board at PC. These are the system which can use industrial settings and homes. It can also make use of an embodiment method about travelling image robot.

• Proceedings of the KSRS Conference
• /
• 2007.10a
• /
• pp.171-174
• /
• 2007

The COMS flight software is implemented by ADA language and the high level application program language (APL). The APL is used to implement the Interpreted Program (IP) functions which are running on the processor. The IP functions have been developed for the payload management and monitoring with the automatic on-board operational procedure. The IP allows an easier re-programming if necessary. The ground can load or unload IP separately from ADA code in the RAM flight software. The uploaded IP is interpreted and executed by the Interpreted Program Environment (IPE) which is one of the functions implemented in the RAM flight software. In this paper, we introduce the IP and IPE function.

• Proceedings of the IEEK Conference
• /
• 2007.07a
• /
• pp.351-352
• /
• 2007

본 논문에서는 인간의 시각 특성 중 특정 물체의 거리를 지각하는 메커니즘을 실시간 처리를 위해 하드웨어로 구현하였다. 본 논문에서 구현된 시스템은 크게 스테레오 영상 입 출력부와 영상을 처리하기 위한 IP 부로 구성된다. 입 출력부는 ALTERA 사의 Excalibur을 기반으로 하여 Image Decoder, UART, SDRAM, SRAM, TFT-LCD등으로 구성된 Image Board로 스테레오 영상을 받아 처리할 수 있게 설계하였다. IP부분은 Image Decoder 내부 레지스터를 설정하기 위한 I2C 버스 IP, 두 개의 Image Decoder를 통해 들어오는 스테레오 영상 입력 IP, 에러 보정을 위한 미디언 필터링 IP부, 에지 검출 IP, 거리를 검출하기 위한 스테레오 정합을 IP와 결과 영상을 보여주기 위한 TFT-LCD IP를 구현하였다.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.22 no.3
• /
• pp.499-505
• /
• 2018

Shipping and logistics safety, security system is strengthening worldwide, the development of shipping and logistics safety security core technology for national security logistics system construction has been carried out. In addition, it is necessary to localize the Array Detection System, which is a core component of the container search machine, to cope with the 100% pre-inspection of the container scheduled for 2018 in the United States. In this research, we propose a test software program developed by using TI-RTOS (Texas Instruments - Real Time Operating System) with a test digital signal processing board which is developed self development. We have developed a program that can test GPIO, SRAM, TCP/IP, and SDcard using M4 MCU. Also we propose a study on a self-developed Digital Signal Processing Board among the array detection systems that replace foreign products. We have developed a test board that can test M4 MCU and developed an X-Ray Detector Digital Signal Processing Board that combines MCU and FPGA.

• The Journal of the Korea institute of electronic communication sciences
• /
• v.11 no.5
• /
• pp.465-472
• /
• 2016

This study materialized an FPGA-based system to extract PCB patterns. The Printed Circuit Boards that are produced these days are becoming more detailed and complex. Therefore, the importance of a vision system to extract defects of detailed patterns is increasing. This study produced an FPGA-based system that has high speed handling for vision automation of the PCB production process. A vision library that is used to extract defect patterns was also materialized in IPs to optimize the system. The IPs materialized are Camera Link IP, pattern matching IP, VGA IP, edge extraction IP, and memory IP.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.35 no.2C
• /
• pp.182-192
• /
• 2010

This paper proposes the hardware IP design of JBIG2 encoder. In order to facilitate the next generation FAX after the standardization of JBIG2, major modules of JBIG2 encoder are designed and implemented, such as symbol extraction module, Huffman coder, MMR coder, and MQ coder. ImpulseC Codeveloper and Xilinx ISE/EDK program are used for the synthesis of VHDL code. To minimize the memory usage, 128 lines of input image are processed succesively instead of total image. The synthesized IPs are downloaded to Virtex-4 FX60 FPGA on ML410 development board. The four synthesized IPs utilize 36.7% of total slice of FPGA. Using Active-HDL tool, the generated IPs were verified showing normal operation. Compared with the software operation using microblaze cpu on ML410 board, the synthesized IPs are better in operation time. The improvement ratio of operation time between the synthesized IP and software is 17 times in case of symbol extraction IP, and 10 times in Huffman coder IP. MMR coder IP shows 6 times faster and MQ coder IP shows 2.2 times faster than software only operation. The synthesized H/W IP and S/W module cooperated to succeed in compressing the CCITT standard document.

• Proceedings of the Korea Contents Association Conference
• /
• 2006.11a
• /
• pp.845-848
• /
• 2006

In this paper, a ETI management system for a variety of media services based on Terrestrial-Digital Multimedia Broadcasting(T-DMB) is introduced. This system consists of DMB I/O board and DMB multiplexer. The system transforms media data stream over IP(TCP/IP or UDP/IP) for these services to ETI frame(G.703) pushed to T-DMB transmitter.

• The Journal of Korean Institute of Next Generation Computing
• /
• v.13 no.5
• /
• pp.19-28
• /
• 2017

Various methods for reducing the load on the server have been implemented in performing face recognition remotely by the spread of IP security cameras. In this paper, IP surveillance cameras at remote sites are input through a DSP board equipped with face detection function, and then face detection is performed. Then, the facial region image is transmitted to the server, and the face recognition processing is performed through face recognition distributed processing. As a result, the overall server system load and significantly reduce processing and real-time face recognition has the advantage that you can perform while linked up to 256 cameras. The technology that can accomplish this is to perform 64-channel face recognition per server using distributed processing server technology and to process face search results through 250 camera channels when operating four distributed processing servers there was.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.43 no.10 s.352
• /
• pp.126-133
• /
• 2006

This paper describes an AMBA-based IP to perform forward and inverse transform and quantization required in the H.264 video compression standard. The transform and quantization circuit was optimized for area and performance. The AHB wrapper was added to the circuit for the AMBA-based operation. The user of the IP can specify how long the bus may be occupied by the IP and also where the video data are stored in the external memory. The function of the proposed IP based on AMBA Specification was verified on the platform board with Xilinx FPGA and ARM9 processor. We fabricated an MPW chip using $0.25{\mu}m$ standard cells and observed its correct operations on silicon.

• The Journal of Society for e-Business Studies
• /
• v.9 no.4
• /
• pp.137-155
• /
• 2004

A video-conference system is being utilized in web based application services in various fields due to the widespread use of Internet and the progress of computer technologies. This system should use the public IP address for sharing file and white board and it is difficult to manage the internal network users of the firewall and non-public IP address users. In this paper, we propose an Application Level Gateway which transforms non-public IP address into public IP address. This mechanism is for the internal network users of the firewall or non-public IP address users over the Internet. We also propose a Control Daemon which manages video and audio media dynamically according to network bandwidth. This mechanism can start and terminate a video conference and manage the process of the video conference.