• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 제5회 영호남 학술대회 논문집
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• pp.12-14
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• 2003

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP). process was required for the global planarization of inter-metal dielectric (IMD) layer with free-defect. However, as the IMD layer gets thinner, micro-scratches are becoming as major defects. Micro-scratches are generated by agglomerated slurry, solidified and attached slurry in pipe line of slurry supply system. It is well known that the presence of hard and larger size particles in the CMP slurries increases the defect density and surface roughness of the polished wafers. In this paper, we have studied. aging effect the of CMP slurry as a function of particle size. We prepared and compared the self-developed silica slurry by adding of abrasives before and after annealing. As our preliminary experiment results, we could be obtained the relatively stable slurry characteristics comparable to original silica slurry in the slurry aging effect.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 춘계학술대회 논문집 센서 박막재료 반도체 세라믹
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• pp.37-40
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• 2003

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric (IMD) layer with free-defect. However, as the IMD layer gets thinner, micro-scratches are becoming as major defects. Micro-scratches are generated by agglomerated slurry, solidified and attached slurry in pipe line of slurry supply system. It is well known that the presence of hard and larger size particles in the CMP slurries increases the defect density and surface roughness of the polished wafers. In this paper, we have studied aging effect the of CMP slurry as a function of particle size. We prepared and compared the self-developed silica slurry by adding of abrasives before and after annealing. As our preliminary experiment results, we could be obtained the relatively stable slurry characteristics comparable to original silica slurry in the slurry aging effect.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 C
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• pp.1600-1604
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• 2004

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. The effect of alternative commerical slurries pads, and post-CMP cleaning alternatives are discuess, with removal rate, scratch dentisty, surface roughness, dishing, erosion and particulate density used as performance metrics. we investigated the performance of $SnO_2$-CMP process using commonly used silica slurry, ceria slurry, tungsten slurry. This study shows removal rate and nonuniformity of $SnO_2$ thin film used to gas sensor by using Ceria, Silica, W-Slurry after CMP process. This study also shows the relation between partical size and CMP with partical size analysis of used slurry.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 춘계학술대회 논문집 반도체 재료 센서 박막재료 전자세라믹스
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• pp.93-96
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• 2004

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. The effect of alternative commerical slurries pads, and post-CMP cleaning alternatives are discuess, with removal rate, scratch dentisty, surface roughness, dishing, erosion and particulate density used as performance metrics. we investigated the performance of $SnO_2$-CMP process using commonly used silica slurry, ceria slurry, tungsten slurry. This study shows removal rate and nonuniformity of $SnO_2$ thin film used to gas sensor by using Ceria, Silica, W-Slurry after CMP process. This study also shows the relation between partical size and CMP with partical size analysis of used slurry.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
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• pp.158-159
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• 2006

The resistance-capacitance (RC) delay of signals through interconnection materials becomes a big hurdle for high speed operation of semiconductors which contain multilayer interconnection layers. In order to reduce the RC delay, low-k materials will be used for inter-metal dielectric (IMD) materials. We have developed self-consistent simulation tool that includes neutral-species transport model, based on the relaxation continuum (RCT) model. We present the parametric study of the modeling results of a two-frequency capacitively coupled plasma (2f-CCP) with $N_2/H_2$ gas mixture that is known as promising one for organic low-k materials etching. We include the neutral transport model as well as plasma one in the calculation. The plasma and neutrals are calculated self-consistently by iterating the simulation of both species till a spatiotemporal steady state profile could be obtained.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.1
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• pp.389-392
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• 2004

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. The effect of alternative commerical slurries pads, and post-CMP cleaning alternatives are discuess, with removal rate, scratch dentisty, surface roughness, dishing, erosion and particulate density used as performance metrics. we investigated the performance of $SnO_2$-CMP process using commonly used silica slurry, ceria slurry, tungsten slurry. This study shows removal rate and non-uniformity of $SnO_2$ thin film used to gas sensor by using Ceria, Silica, W-Slurry after CMP process. This study also shows the relation between particle size and CMP with particle size analysis of used slurry.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 추계학술대회 논문집 Vol.16
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• pp.184-187
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• 2003

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) lyaer with free-defect. The effect of alternative commerical slurries pads, and post-CMP cleaning alternatives are discuess, with removal rate, scratch dentisty, surface roughness, dishing, erosion and particulate density used as performance metrics. we investigated the performance of $SnO_2-CMP$ process using commonly used silica slurry, ceria slurry, tungsten slurry. This study shows removal rate and nonuniformity of $SnO_2$ thin film used to gas sensor by using Ceria, Silica, W-Slurry after CMP process. This study also shows the relation between partical size and CMP with partical size analysis or used slurry.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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• pp.731-734
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• 2004

As the integrated circuit device shrinks to the smaller dimension, the chemical mechanical polishing (CMP) process was required for the global planarization of inter-metal dielectric(IMD) layer with free-defect. Polishing pads play a key role in CMP, which has been recognized as a critical step to improve the topography of wafers for semiconductor fabrication. It is investigated the performance of $SiO_2-CMP$ process using commercial silica slurry as a pad conditioning temperature increased after CMP process. This study also showed the change of SEM images in the pore geometry on the CMP pad surface after use with a different pad conditioning temperature.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제55권12호
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• pp.601-605
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• 2006

The resistance-capacitance (RC) delay of signals through interconnection materials becomes a big hurdle for high speed operation of semiconductors which contain multi-layer interconnections in smaller scales with higher integration density. Low-k materials are applied to the inter-metal dielectric (IMD) materials in order to overcome the RC delay. Relaxation continuum (RCT) model that includes neutral-species transport model have developed to model the etching process in a capacitively coupled plasma (CCP) device. We present the parametric study of the modeling results of a two-frequency capacitively coupled plasma (2f-CCP) with $N_2/H_2$ gas mixture that is known as promising one for organic low-k materials etching. For the etching of low-k materials by $N_2/H_2$ plasma, N and H atoms have a big influence on the materials. Moreover the distributions of excited neutral species influence the plasma density and profile. We include the neutral transport model as well as plasma one in the calculation. The plasma and neutrals are calculated self-consistently by iterating the simulation of both species till a spatio-temporal steady state profile could be obtained.

• 마이크로전자및패키징학회지
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• 제25권3호
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• pp.31-36
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• 2018

본 연구에서는 DRAM 소자의 Pressure Cooker Test (PCT) 신뢰성 평가 후 발생한 불량 원인에 대한 연구를 진행하였다. 불량 시료의 물리적 관측 결과 변색, Al의 부식 및 손실, 그리고 금속 간 중간 절연막 박리 등이 관측되었다. 추가 물리적 화학적 분석 결과 비정상적인 물질인 $Al_XO_Y$ 층을 발견하였다. 불량 원인을 파악 하기 위해 package ball 크기 실험 및 보호막 pin hole 등의 연관성 실험을 진행하였으나 원인으로 판명되지 않았다. 또한 EMC 물질에 포함되어 있는 Cl에 의한 Al 할로겐화 평가를 진행하였다. 진행 결과 약간의 개선 효과를 보였지만 완벽한 문제 해결을 이루어 내지 못했다. Galvanic corrosion 가능성 가설을 세웠고, 면밀한 분석 결과 pad open 지역에서 Ti 잔존물을 발견할 수 있었다. 검증 실험으로 repair 식각 분리 실험을 진행하여 개선 효과를 보았다. 개선 된 조건에서 PCT 신뢰성 기준치를 만족 하는 결과를 얻었다. 금번 PCT 불량 메카니즘은 다음과 같이 설명할 수 있다. 공정 repair etch시 Ti 잔류물이 남아 Galvanic 메커니즘에 의해 Al이 이온화 된다. 이온화 된 Al이 후속 PCT 신뢰성 측정 시 $H_2O$와 반응하여 비 정상 물질인 $Al_XO_Y$를 생성하였다.