• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.81-81
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• 2007

Chemical mechanical polishing (CMP) 공정은 deep 서브마이크론 집적회로의 다층배선구조률 실현하기 위해 inter-metal dielectric (IMD), inter-layer dielectric layers (ILD), pre-metal dielectric (PMD) 층과 같은 절연막 외에도 W, Al, Cu와 같은 금속층을 평탄화 하는데 효과적으로 사용되고 있으며, 다양한 소자 제작 및 새로운 물질 등에도 광범위하게 응용되고 있다. 하지만 Cu damascene 구조 제작으로 인한 CMP 응용 과정에서, 기계적으로 깨지기 쉬운 65 nm의 소자 이하의 구조에서 새로운 저유전상수인 low-k 물질의 도입으로 인해 낮은 하력의 기계적 연마가 필요하게 되었다. 본 논문에서는 전기화학적 기계적 연마 적용을 위해, I-V 특성 곡선을 이용하여 active, passive, transient, trans-passive 영역의 전기화학적 특성을 알아보았으며, Cu 막의 표면 형상을 알아보기 위해 scanning electron microscopy (SEM) 측정과 energy dispersive spectroscopy (EDS) 분석을 통해 금속 화학적 조성을 조사하였다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.10
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• pp.1049-1055
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• 2004

Chemical Mechanical Polishing (CMP) is referred to as a three body tribological system, because it includes two solids in relative motion and the CMP slurry. On the assumption that the abrasives between the pad and the wafer could be a major reason not only for the friction force but also for material removal during polishing, the friction force generated during CMP process was investigated with the change of abrasive size and concentration of CMP slurry. The threshold point of average coefficient of friction (COF) with increase in abrasives concentration during interlayer dielectric (ILD) CMP was found experimentally and verified mathematically based on contact mechanics. The predictable models, Mode I (wafer is in contact with abrasives and pad) and Mode II (wafer is in contact with abrasives only), were proposed and used to explain the threshold point. The average COF value increased in the low abrasives concentration region which might be explained by Mode I. In contrast the average COF value decreased at high abrasives concentration which might be regarded to as Mode II. The threshold point observed seemed to be due to the transition from Mode I to Mode II. The tendency of threshold point with the variation of abrasive size was studied. The increase of particle radius could cause contact status to reach transition area faster. The correlation between COF and material removal rate was also investigated from the tribological and energetic point of view. Due to the energy loss by vibration of polishing equipment, COF value is not proportional to the material removal rate in this experiment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.118-118
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• 2008

The oxide CMP has been applied to interlayer dielectric(ILD) and shallow trench isolation (STI) in chip fabrication. Recently the slurry used in oxide CMP being changed from silica slurry to ceria (cerium dioxide) slurry particularly in STI CMP, because the material selectivity of ceria slurry is better than material selectivity of silica slurry. Moreover, the ceria slurry has good a planarization efficiency, compared with silica slurry. However ceria abrasives make a material removal rate too high at the region of wafer center. Then we focuses on why profile of material removal rate is convex. The material removal rate sharply increased to 3216 $\AA$/min by $4^{th}$ run without conditioning. After $4^{th}$ run, material removal rate converged. Furthermore, profile became more convex during 12 run. And average material removal rate decreased when conditioning process is added to end of CMP process. This is due to polishing mechanism of ceria. Then the ceria abrasive remains at the pad, in particular remains more at wafer center contacted region of pad. The field emission scanning electron microscopy (FE-SEM) images showed that the pad sample in the wafer center region has a more ceria abrasive than in wafer outer region. The energy dispersive X-ray spectrometer (EDX) verified the result that ceria abrasive is deposited and more at the region of wafer center. Therefore, this result may be expected as ceria abrasives on pad surface causing the convex profile of material removal rate.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.163-163
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• 2008

반도체 소자가 고집적화 되고 고속화를 필요로 하게 됨에 따라, 기존에 사용되었던 알루미늄이나 텅스텐보다 낮은 전기저항, 높은 electro-migration resistance으로 미세한 금속배선 처리가 가능한 Cu가 주목받게 되었다. 하지만 과잉 디싱 현상과 에로젼을 유도하여 메탈라인 브리징과 단락을 초래할 있고 Cu의 단락인 islands를 남김으로서 표면 결함을 제거하는데 효과적이지 못다는 단점을 가지고 있었다. 특히 평탄화 공정시 높은 압력으로 인하여 Cu막의 하부인 ILD막의 다공성의 low-k 물질의 손상을 초래 할 수 있는 문제점을 해결하기 위하여 기존의 CMP에 전기화학을 결합시킴으로서 낮은 하력에서의 Cu 평탄화를 달성 할 수 있는 기존의 CMP 기술에 전기화학을 접목한 새로운 개념의 ECMP (electrochemical-mechanical polishing) 기술이 생겨나게 되었다. 따라서 본 논문에서는 최적화된 ECMP 공정을 위하여 I-V곡선과 CV법을 이용하여 active. passive. trans-passive 영역의 전기화학적 특징을 알아보았고. Cu막의 표면 형상을 알아보기 위해 Scanning Electron Microscopy (SEM) 측정과 Energy Dispersive Spectroscopy (EDS) 분석을 통해 금속 화학적 조성을 조사하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.11a
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• pp.362-363
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• 2005

The objectives of this paper are to achieve good planarization of the deposited film and to improve deposition efficiency of multi-layer structures by using surface-micromaching process in MEMS technology. Planarization characteristic of poly-Si film deposited on thin oxide layer with MEMS structures is evaluated with different slurries. Patterns used for this research have shapes of square, density, line, hole, pillar, and micro engine part. Advantages and disadvantages of CMP for MEMS structures are observed respectively by using the test patterns with structures larger than 1 um line width. Preliminary tests for material selectivity of poly-Si and oxide are conducted with two types of slurries: ILD1300 and Nalco2371. And then, the experiments were conducted based on the pretest.