• Title/Summary/Keyword: High speed network

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Iub Congestion Detection Method for WCDMA HSUPA Network to Improve User Throughput (WCDMA HSUPA 망의 성능 향상을 위한 Iub 혼잡 검출 방법)

  • Ahn, Ku-Ree;Lee, Tae-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.1A
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    • pp.16-24
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    • 2010
  • High Speed Uplink Packet Access(HSUPA) is a WCDMA Release 6 technology which corresponds to High Speed Downlink Packet Access(HSDPA). Node B Supports fast scheduling, Hybrid ARQ(HARQ), short Transmission Time Interval(TTI) for high rate uplink packet data. It is very important to detect Iub congestion to improve end user's Quality of Service(QoS). This paper proposes Node B Congestion Detection(BCD) mechanism and suggests to use the hybrid of Transport Network Layer(TNL) congestion detection and BCD. It is shown that HSUPA user throughput performance can be improved by the proposed method even with small Iub bandwidth.

Real-time prediction of dynamic irregularity and acceleration of HSR bridges using modified LSGAN and in-service train

  • Huile Li;Tianyu Wang;Huan Yan
    • Smart Structures and Systems
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    • v.31 no.5
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    • pp.501-516
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    • 2023
  • Dynamic irregularity and acceleration of bridges subjected to high-speed trains provide crucial information for comprehensive evaluation of the health state of under-track structures. This paper proposes a novel approach for real-time estimation of vertical track dynamic irregularity and bridge acceleration using deep generative adversarial network (GAN) and vibration data from in-service train. The vehicle-body and bogie acceleration responses are correlated with the two target variables by modeling train-bridge interaction (TBI) through least squares generative adversarial network (LSGAN). To realize supervised learning required in the present task, the conventional LSGAN is modified by implementing new loss function and linear activation function. The proposed approach can offer pointwise and accurate estimates of track dynamic irregularity and bridge acceleration, allowing frequent inspection of high-speed railway (HSR) bridges in an economical way. Thanks to its applicability in scenarios of high noise level and critical resonance condition, the proposed approach has a promising prospect in engineering applications.

A study on Performance Evaluation for Network Architecture using Quantum Key Distribution Technology (양자암호기반의 통신망 구축 및 성능시험 검증연구)

  • Lee, Wonhyuk;Seok, Woojin;Park, Chanjin;Kwon, Woochang;Sohn, Ilkwon;Kim, Seunghae;Park, Byoungyoen
    • KNOM Review
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    • v.22 no.2
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    • pp.39-47
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    • 2019
  • There are several big data-driven advanced research activities such as meteorological climate information, high energy physics, astronomy research, satellite information data, and genomic research data on KREONET. Since the performance degradation occurs in the environment with the existing network security equipment, methods for preventing the performance degradation on the high-performance research-only network and for high-speed research collaboration are being studied. In addition, the recent issue of quantum computers has been a threat to security using the existing encryption system. In this paper, we construct quantum cryptography-based communication network through environment construction and high-performance transmission test that build physical security through quantum cryptography-based communication network in end-to-end high-speed research network. The purpose of this study is to analyze the effect on network performance when performing physical encryption and to use it as basic data for constructing high-performance research collaboration network.

Robust Adaptive Wavelet-Neural-Network Sliding-Mode Speed Control for a DSP-Based PMSM Drive System

  • El-Sousy, Fayez F.M.
    • Journal of Power Electronics
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    • v.10 no.5
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    • pp.505-517
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    • 2010
  • In this paper, an intelligent sliding-mode speed controller for achieving favorable decoupling control and high precision speed tracking performance of permanent-magnet synchronous motor (PMSM) drives is proposed. The intelligent controller consists of a sliding-mode controller (SMC) in the speed feed-back loop in addition to an on-line trained wavelet-neural-network controller (WNNC) connected in parallel with the SMC to construct a robust wavelet-neural-network controller (RWNNC). The RWNNC combines the merits of a SMC with the robust characteristics and a WNNC, which combines artificial neural networks for their online learning ability and wavelet decomposition for its identification ability. Theoretical analyses of both SMC and WNNC speed controllers are developed. The WNN is utilized to predict the uncertain system dynamics to relax the requirement of uncertainty bound in the design of a SMC. A computer simulation is developed to demonstrate the effectiveness of the proposed intelligent sliding mode speed controller. An experimental system is established to verify the effectiveness of the proposed control system. All of the control algorithms are implemented on a TMS320C31 DSP-based control computer. The simulated and experimental results confirm that the proposed RWNNC grants robust performance and precise response regardless of load disturbances and PMSM parameter uncertainties.

Analysis of the TCP performance over IEEE1394 based Home Networkings (IEEE1394 기반의 홈 네트워킹에서의 TCP 성능 분석)

  • 장종욱
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.4
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    • pp.706-715
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    • 2001
  • TCP typically offers reasonable end-to-end performance to users regardless of the bandwidth and error characteristics of particular network technology, The robustness of TCP has contributed to its success in the internet environment. The role of communications is already well established in the office environment. With the advent of cheap, affordable broadband communications and the increasing complexity of consumer goods, it seems natural to extend the network into homes. In-home networking means a high-speed communication among the digital appliances within a home. Introduction of application over high-speed home network using TCP/IP protocol is increasing. The integrated environment of internet and home network is demanding as well. We have validated TCP model over high speed home network environment, investigated the throughput behavior of TCP over IEEE 1399 home networks, and evaluated a potential solution for high performance of TCP over IEEE 139t home networks. The simulation model has produced several interesting results in the performance of TCP over IEEE 1394 home network.

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Design and Implementation of Backplane for High Speed Router (고속라우터용 백플레인 설계 및 구현)

  • 이상우;이강복;이형섭;이형호
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.275-278
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    • 2000
  • As the operating frequency of digital modules in network system becomes fast, integrity of signals between modules is regarded as a important factor in high speed system design. To guarantee the signal integrity, many factors that deteriorate quality of signal should be considered. In this paper, we survey many factors which be considered while in designing and imp]ementing the backplane for high speed router and analyze the simulation result and experimental result.

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High speed rail-air links : some lessons from the French case (고속철도와 항공기의 연계체계 : 프랑스 사례와 시사점)

  • 이경철;문대섭;정병현
    • Proceedings of the KSR Conference
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    • 2002.05a
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    • pp.111-115
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    • 2002
  • The TGV has been developed in a competition with the domestic air transport. But recently, with congestion, do-regulation of air transport and with the increase of number of cities served by the TGV, operators of rail and air transport are looking for a complementarity between the two modes. In this paper, we'll analyse the background and development of high-speed rail-air links in France for a development plan of high speed transportation network in a national level in Korea.

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High-speed power network for catenary abnormal voltage effect and analysis (고속선 전차선로 이상전압 발생의 영향과 분석)

  • Lee, Gi-Chun;Jeon, Yong-Joo
    • Proceedings of the KIEE Conference
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    • 2007.07a
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    • pp.1161-1162
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    • 2007
  • In year 2004 korea runs high speed train KTX for the 5th time in the world. And now the traction power system is quite stabilized. But still a lot of work to develop and abnormal voltage problem is one of them. In this paper, by actual measuring we have collected the abnormal data on the high speed train sub-staion for more than 15 days. The collected data has been evaluated. In the near future collected data will be used planing a countermeasure.

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Prediction of Surface Roughness using double ANN and the Efficient Machining Database Building Scheme in High Speed Machining (고속가공에서 2중 신경망을 이용한 표면거칠기 예측과 가공DB 구축 효율화 방안)

  • 원종률;남성호;유송민;이석우;최헌종
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2004.10a
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    • pp.411-415
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    • 2004
  • In this paper, a double artificial neural network (ANN) approach and the efficient machining database building scheme are presented for the prediction of surface roughness in high-speed machining. In this approach, 4 machining parameters and used for the prediction of cutting force components, and the combinations of 4 parameters and the predicted cutting force components are finally used for the prediction of surface roughness. The experimental results comparing the these results with the predicted values using simple 4 input nodes have been also investigated to verify the effectiveness of the proposed approach.

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Design of High Speed Encryption/Decryption Hardware for Block Cipher ARIA (블록 암호 ARIA를 위한 고속 암호기/복호기 설계)

  • Ha, Seong-Ju;Lee, Chong-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.57 no.9
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    • pp.1652-1659
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    • 2008
  • With the increase of huge amount of data in network systems, ultimate high-speed network has become an essential requirement. In such systems, the encryption and decryption process for security becomes a bottle-neck. For this reason, the need of hardware implementation is strongly emphasized. In this study, a mixed inner and outer round pipelining architecture is introduced to achieve high speed performance of ARIA hardware. Multiplexers are used to control the lengths of rounds for 3 types of keys. Merging of encryption module and key initialization module increases the area efficiency. The proposed hardware architecture is implemented on reconfigurable hardware, Xilinx Virtex2-pro. The hardware architecture in this study shows that the area occupied 6437 slices and 128 BRAMs, and it is translated to throughput of 24.6Gbit/s with a maximum clock frequency of 192.9MHz.