• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.93-94
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• 2007

An essential step for SERGI is to show the TRANSFORMER PROTECTOR (TP) efficacy for all transformers and all types of rupture of insulation. Its research program philosophy is thus to maintain a strong connection between experiments and the theoretical developments. Up to now, two TP test campaigns have been performed, both under the worst conditions by creating low impedance faults leading to electrical arcs inside the transformer tank dielectric oil. In 2002, Electricite de France performed 28 TP tests. Then, in 2004, a second campaign of 34 TP tests was carried out by CEPEL, the Brazilian independent High Voltage Laboratory. For the 62 tests, each transformer was equipped with the TP, which reacts directly to the moving dynamic pressure peak, shock wave, caused by the low impedance fault. When an electrical arc occurs, only one pressure peak is generated. The initial energy transfer is almost instantaneous, and so is the phase change. Because of the oil inertia, the gas is very quickly pressurised. As it is more difficult to vaporise a liquid than to crack oil-vapour into smaller molecules, the arc location would mainly remain in the gaseous phase after and less gas will be produced. As a result, when comparing tests for which pressure peaks are respectively equal to 8 bar (116 psi) and 8.8 bar (127 psi), the corresponding arc energies vary by an order 10 of magnitude (0.1 MJ and 1 MJ respectively). The correlation of the results obtained between arc energy and dynamic pressure demonstrates that the arc energy is not the key parameter during transformer tank explosion, which is in opposition with the common electrical engineers belief.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.603_604
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• 2009

HTS tape is developed for the purpose of being applied to the power cable, motor and generator, etc. The resistance of conventional power cables is not changed a lot by over current condition. But HTS(High temperature superconductor)power cable has some different properties. The impedance of superconductor is changed due to the magnitude of current, temperature, and magnetic field. And the characteristics analysis of HTS power cable under many kind of fault conditions are important to apply real system. In addition the magnitude of over current is 10 times larger than rated current. In this paper, the characteristics of HTS power cable are analyzed when over current flows. Model cable used 2G wires was made and experimented. The results will be helpful to manufacture real HTS power cable.

• Proceedings of the KIEE Conference
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• 1999.11b
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• pp.219-221
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• 1999

HVDC(High Voltage Direct Current) transmission system was constructed between Cheju island and mainland Haenam and has been operating commercially since 1998. But research activities in this area are not so much. That is caused by the facts that HVDC is large scale system and it is not so easy to implement and to test. Though such simulation tools as RTDS(Real Time Digital Simulator) and EMTDC can be useful, these have limitations for actual control and protective system design. Therefore scaled-down HVDC model was developed for the purpose of researches at operating technique, control and protection methods. The design of this model was based on real Cheju-Haenam HVDC system. And additionally faults simulator such as ground fault, short-circuit and change of impedance in transmission line is equipped for analysis of these faults. Control system of the model was implemented fully digitally. So it is very easy for the researchers to develope control and protection algorithm and to test the performance.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2009.05a
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• pp.348-351
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• 2009

In order to evaluate the performance of a grounding system against lightning or fault currents including high frequency components, the grounding impedance should be considered rather than its ground resistance. Recently, some researches on the evaluation and modeling of the grounding impedances have been carried out but the results have not been yet sufficient. This paper deals with the frequency dependence of the resistivity and relative dielectric constant of sand associated with water contents. As a result, the resistivity of sand is getting lower with increasing water content and it is nearly independent on the frequency in the range of less than 1MHz, and is decreased over the frequency range of above 1MHz. Also, the relative dielectric constant is rapidly decreased with the frequency in the range of less than 10kHz, but it is nearly not dependent on the frequency over the frequency range of 10kHz. It was found from this work that the frequency dependance of resistivity and relative dielectric constant of soil should be considered in designing the grounding systems for protection against lightning or surges.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.523-523
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• 2012

As the wafer geometric requirements continuously complicated and minutes in tens of nanometers, the expectation of real-time add-on sensors for in-situ plasma process monitoring is rapidly increasing. Various industry applications, utilizing plasma impedance monitor (PIM) and optical emission spectroscopy (OES), on etch end point detection, etch chemistry investigation, health monitoring, fault detection and classification, and advanced process control are good examples. However, process monitoring in semiconductor manufacturing industry requires non-invasiveness. The hypothesis behind the optical monitoring of plasma induced ion current is for the monitoring of plasma induced charging damage in non-invasive optical way. In plasma dielectric via etching, the bombardment of reactive ions on exposed conductor patterns may induce electrical current. Induced electrical charge can further flow down to device level, and accumulated charges in the consecutive plasma processes during back-end metallization can create plasma induced charging damage to shift the threshold voltage of device. As a preliminary research for the hypothesis, we performed two phases experiment to measure the plasma induced current in etch environmental condition. We fabricated electrical test circuits to convert induced current to flickering frequency of LED output, and the flickering frequency was measured by high speed optical plasma monitoring system (OPMS) in 10 kHz. Current-frequency calibration was done in offline by applying stepwise current increase while LED flickering was measured. Once the performance of the test circuits was evaluated, a metal pad for collecting ion bombardment during plasma etch condition was placed inside etch chamber, and the LED output frequency was measured in real-time. It was successful to acquire high speed optical emission data acquisition in 10 kHz. Offline measurement with the test circuitry was satisfactory, and we are continuously investigating the potential of real-time in-situ plasma induce current measurement via OPMS.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.5
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• pp.1-12
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• 1999

A new algorithm of constructing binary decision diagram(BDD) for design verification of switch-level circuits is proposed in this paper. In the switch-level circuit, functions are characterized by serial and parallel connections of switches and the final logic values may have high-impedance and unstable states in addition to the logic values of 0 and 1. We extend the BDD to represent functions of switch-level circuits as acyclic graphs so called switch-level binary decision diagram (SLBDD). The function representation of the graph is in the worst case, exponential to the number of inputs. Thus, the ordering of decision variables plays a major role in graph sizes. Under the existence of pass-transistors and domino-logic of precharging circuitry, we also propose an input ordering algorithm for the efficiency in graph sizes. We conducted several experiments on various benchmark circuits and the results show that our algorithm is efficient enough to apply to functional simulation, power estimation, and fault-simulation of switch-level design.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.12
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• pp.2109-2112
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• 2016

The rate of rise of the fault current in DC grids is very high compared to AC grids because of the low line impedance of DC lines. In AC grids the arc of the circuit breaker under current interruption is extinguished by the zero current crossing which is provided naturally by the system. In DC grids the zero current crossing must be provided by the circuit breaker itself. Unlike AC girds, the magnetic energy of DC grids is stored in the system inductance. The DC circuit breaker must dissipate the stored energy. In addition the DC breaker must withstand the residual overvoltage after the current interruption. The main contents of this paper are to ${\cdot}$ Explain the theoretical background for the design of DC circuit breaker. ${\cdot}$ Develop the simulation model in PSIM of the real scaled DC circuit breaker for 1,800V DC railway. ${\cdot}$ Suggest design guidelines for the DC circuit breaker based on the experimental work, simulations and design process.