• Title/Summary/Keyword: High Order Modulations

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Bit-to-Symbol Mapping Strategy for LDPC-Coded Turbo Equalizers Over High Order Modulations (LDPC 부호 기반의 터보 등화기에 적합한 고차 변조 심볼사상)

  • Lee, Myung-Kyu;Yang, Kyeong-Cheol
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.5C
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    • pp.432-438
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    • 2010
  • In this paper we study the effect of bit-to-symbol mappings on the convergence behavior of turbo equalizers employing low-density parity-check (LDPC) codes over high order modulations. We analyze the effective SNR of the outputs from linear minimum mean-squared error (MMSE) equalizers and the convergence property of LDPC decoding for different symbol mappings. Numerical results show that the bit-reliability (BR) mapping provides better performance than random mapping in LDPC-coded turbo equalizers over high order modulations. We also verify the effect of symbol mappings through the noise threshold and error performance.

Hybrid PWM Modulation Technology Applied to Three-Level Topology-Based PMSMs

  • Chen, Yuanxi;Guo, Xinhua;Xue, Jiangyu;Chen, Yifeng
    • Journal of Power Electronics
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    • v.19 no.1
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    • pp.146-157
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    • 2019
  • The inverter is an essential part of permanent magnet synchronous motor (PMSM) drive systems. The performance of an inverter is greatly influenced by its modulation strategy. Using a proper management of modulation strategies can guarantee high performance from a PMSM under various speed conditions. Switching between modulations is a pivotal technique that determines the performance of a PMSM. Most works on hybrid methods focus on two-level induction motors drive systems. In this paper, in order to improve the performance of PMSMs under various speed conditions, a hybrid method of a pulse width modulation (PWM) control scheme based on a neutral-point-clamped (NPC) three level topology was proposed. This hybrid PWM modulation comprised space vector PWM (SVPWM) and selective harmonic elimination PWM (SHEPWM). Under low speed conditions, the SVPWM is employed to cause the PMSM to start smoothly, and to obtain a rapid response from the control system. Under high speed conditions, the SHEPWM is employed to reduce the switching frequency and to eliminate particular current harmonics. Moreover, the harmonic characteristics of different modulations are analyzed to obtain a smooth transition between the SHEPWM and the SVPWM. Experimental and simulation results indicated the effectiveness of the proposed control method.

Organic Light Emitting Transistors for Flexible Displays

  • Kudo, Kazuhiro;Endoh, Hiroyuki;Watanabe, Yasuyuki
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07a
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    • pp.137-140
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    • 2005
  • Organic light emitting transistors (OLET) which are vertically combined with the organic static induction transistor (OSIT) and organic light emitting diode (OLED) are fabricated and the device characteristics are investigated. High luminance modulations by relatively low gate voltages are obtained. In order to realize the flexible electronic circuits and displays, we have fabricated OSIT on plastic substrates. The OSIT fabricated on plastic substrate show almost same characteristics comparing with those of nonflexible OSIT on glass substrate. The OLET described here is a suitable element for flexible sheet displays.

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Efficient Detection of Space-Time Block Codes Based on Parallel Detection

  • Kim, Jeong-Chang;Cheun, Kyung-Whoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.2A
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    • pp.100-107
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    • 2011
  • Algorithms based on the QR decomposition of the equivalent space-time channel matrix have been proved useful in the detection of V-BLAST systems. Especially, the parallel detection (PD) algorithm offers ML approaching performance up to 4 transmit antennas with reasonable complexity. We show that when directly applied to STBCs, the PD algorithm may suffer a rather significant SNR degradation over ML detection, especially at high SNRs. However, simply extending the PD algorithm to allow p ${\geq}$ 2 candidate layers, i.e. p-PD, regains almost all the loss but only at a significant increase in complexity. Here, we propose a simplification to the p-PD algorithm specific to STBCs without a corresponding sacrifice in performance. The proposed algorithm results in significant complexity reductions for moderate to high order modulations.

A Study on PLL Speed Control System of DC Servo Motor for Mobile Robot Drive (자립형 이동로봇 구동을 위한 직류 서보전동기 PLL 속도제어 시스템에 관한 연구)

  • 홍순일
    • Journal of Advanced Marine Engineering and Technology
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    • v.17 no.3
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    • pp.60-69
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    • 1993
  • The speed control associated with dc servo motors for direct-drive applications of mobile robot is considered in this study. Robot is moved by power wheeled steering of two dc servo motors mounted to it. In order to cooperate with micro-computer and to achieve the high-performance operation of dc servo motor, speed control system is composed of a digital Phase Locked Loop and H-type drive circuit. And the motor is driven by Pulse Width Modulations. In controlling PWM, it is modified to compose of H-type drive circuit with feedback diodes and switching transistor and design of control sequence so that it may show linear characteristics. As a result, speed characteristics of motor showed linear features. In order to get data on design of PLL control system, the parameters of 80[W[ motor & robot device is measured by simple software control. The PLL speed control system is schemed and designed by leaner drive circuit and measured parameters. A complete speed control system applied to 80[W] dc servo motor showed good linearity, stability and high response. Also, it is verified that the PLL speed control system has good compatibility as a mobile robot driver.

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A Hybrid CBPWM Scheme for Single-Phase Three-Level Converters

  • Wang, Shunliang;Song, Wensheng;Feng, Xiaoyun;Ding, Rongjun
    • Journal of Power Electronics
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    • v.16 no.2
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    • pp.480-489
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    • 2016
  • A novel hybrid carrier-based pulse width modulation (CBPWM) scheme that combines unipolar and dipolar modulations is proposed for single-phase three-level rectifiers, which are widely applied in railway traction drive systems. The proposed CBPWM method can satisfy the volt-second balancing principle in the complete modulation index region through overmodulation compensation. The modulation scheme features two modulation modes: unipolar and dipolar. The operation range limits of these modulation modes can be modified by changing the separation coefficient. In comparison with the traditional unipolar CBPWM, the proposed hybrid CBPWM scheme can provide advantageous features, such as lower high-order harmonic distortion of the line current and better utilization of switching frequency. The separation coefficient value is optimized to achieve the maximum utilization of these advantages. The experimental results verify the feasibility and effectiveness of the proposed hybrid CBPWM scheme.

A Study on Channel Estimation for High-speed Binary CDMA Systems (고속 Binary CDMA 시스템을 위한 채널 추정에 관한 연구)

  • Kang, Sung-Jin
    • Journal of Advanced Navigation Technology
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    • v.14 no.5
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    • pp.677-683
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    • 2010
  • In this paper, a channel estimation scheme for high-speed Binary CDMA systems is proposed and its performances are investigated. In high-speed Binary CDMA which adopt high order modulations, since BER(bit error rate) performances are deteriorated when equalizer does not converge enough during preamble period it is preferred to set the optimum coefficients of equalizer through channel estimation. In this paper, taking notice of repetition of CAZAC sequence in preamble period, a channel estimation scheme is proposed, which can improve estimation performances with few complexity increase. From the simulation results, one can see that the proposed channel estimation scheme can be implemented simply with no performance deterioration compared to the conventional one.

SER Performance Analysis of Optimal 64-ary QAM Signal Constellation (최적 신호점 배치를 갖는 64-ary QAM의 SER 성능 분석)

  • Yin, Jiming;Jang, Yeonsoo;Hong, Heejin;Yoon, Dongweon
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.10a
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    • pp.715-717
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    • 2014
  • In recent wireless communication systems such as Long Term Evolution-Advanced (LTE-A) system, to transmit large multimedia data, high order modulations including 64-ary quadrature amplitude modulation (QAM) are adopted. However, performance of the modulation depends on the signal constellation in the same modulation order. Therefore, a symbol error rate (SER) expression of optimal performance is necessary for analyzing the SER performance of various signal constellation. The optimal signal constellation based on error bound has been previously described, but an exact SER expression has not been derived. In this paper, we propose an exact SER expression of optimal signal constellation for 64-ary QAM.

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A New Multipath Interference Mitigation Technique for High Speed Data Transmission in WCDMA Downlink (WCDMA 순방향 링크에서의 고속 데이터 전송을 위한 다중 경로 간섭 완화 기법)

  • 유현규;한상철;정성순;홍대식;강창언
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.12A
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    • pp.958-963
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    • 2003
  • Increasing throughput using high order data modulations in the WCDMA downlink requires the elimination of multipath interferences. For this reason, Kenichi Higuchi proposed a multipath interference canceller in WCDMA downlink. However, this paper considers the downlink signal models that only contains code channels for which code information is known to the receiver. WCDMA systems contain code channels for other active users whose code information is unknown to the receiver and these code channels degrade the performance of the multipath interference canceller. Thus, this paper proposes a multipath interference mitigation scheme which removes multipath interference induced by all the code channels within a cell. Simulation results show that the proposed scheme outperforms both the RAKE receiver and the multipath interference canceller in the WCDMA downlink.

Bit Interleaver Design of Ultra High-Order Modulations in DVB-T2 for UHDTV Broadcasting (DVB-T2 기반의 UHDTV 방송을 위한 초고차 성상 변조방식의 비트 인터리버 설계)

  • Kang, In-Woong;Kim, Youngmin;Seo, Jae Hyun;Kim, Heung Mook;Kim, Hyoung-Nam
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.39A no.4
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    • pp.195-205
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    • 2014
  • The ultra-high definition television (UHDTV) has been considered as a next generation broadcsating service. However the conventional digital terrestrial transmission system cannot afford the required transmission data rate of UHDTV, and thus adopting ultra-high order constellation, such as 4096-QAM, into the conventional DTT systems has been studied. In particular, when the ultra-high order constellation is adopted into the digital video broadcasting-2nd generation terrestrial (DVB-T2) unequal-error protection (UEP) properties of a codeword of an error correction coding and ultra-high order constellations should be properly matched by bit mapper in order to enhance the decoding performance. Because long codeword results in a heavy computational complexity to design the bit mapper, the DVB-T2 divided it into cascaded blocks, the bit interleaver and the bit-to-cell DEMUX, and there have been many researches related to each block. However, there are few published study related to design methodology of bit interleaver. In this respect, this paper proposes a design methodology of the bit interleaver and presents bit interleavers of 1024-QAM and 4096-QAM according to the proposed design algorithm. The newly designed interleavers improved the decoding performance of the error correction coding by maximally 0.6 dB SNR over both of AWGN and random fading channel.