• Journal of Advanced Marine Engineering and Technology
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• v.29 no.6
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• pp.618-627
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• 2005

In this paper, we have compared and analyzed the performance of high amplifier using Doherty technique to improve linearity and efficiency of base station and repeater Power amplifier for WCDMA. This Doherty amplifier implements with 3dB branch line coupler and $90^{\circ}C$ transmission line The phase offset line is designed to maintain the high linearity and efficiency at the low efficiency Period of the power amplifier CW 1-tone experimental results at the WCDMA frequency $2.11{\sim}2.17GHz$ shows that Doherty amplifier which achieves power add efficiency(PAE) of 50% at 6dB back off the point from maximum output power 52.3 dBm, obtains higher efficiency of 13.3% than class AB Finding optimum bias Point after adjusted gate voltage, Doherty amplifier shows that $IMD_3$ improves 4dB.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.10 no.5
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• pp.99-104
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• 2011

This paper presents a high power and high efficiency unbalanced Doherty power amplifier used to extend the output power back-off (OPBO). The proposed unbalanced amplifier uses the same type of transistors in both the main amplifier and the peaking amplifier, similar to a conventional symmetric Doherty amplifier. The unbalanced amplifier can have the impedance of a ${\lambda}/4$ transformer located at the output of the main amplifier modified. This enables the OPBO to exceed 6 dB, the maximum OPBO for a conventional symmetric Doherty amplifier. The efficiency and linearity performance of the unbalanced Doherty amplifier are almost same as those found for the asymmetric Doherty amplifier, even though the unbalanced Doherty amplifier structure is simpler than the asymmetric Doherty structure. In order to verify the proposed amplifier performance, a 46 W Doherty amplifier has been both simulated and measured using a CDMA2000 1FA signal. From the measured results, the proposed unbalanced Doherty amplifier achieved an added power efficiency of 38 % and an adjacent channel power ratio of -34 dBc at a 885 kHz offset frequency and -35.6 dBc at a 1.98 MHz offset frequency.

• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.403-408
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• 2008

In this paper, the high efficiency and linearity Doherty power amplifier using DGS and adaptive bias technique has been designed and realized for 2.3GHz WiBro applications. The Doherty amplifier has been implemented us-ing silicon MRF 281 LDMOS FET. The RF performances of the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone, and conventional Doherty amplifier. The Maximum PAE of designed Doherty power amplifier with DGS and adaptive bias technique has been 36.6% at 34.01dBm output power. The proposed Doherty power amplifier showed an improvement 1dB at output power and 7.6% PAE than a class AB amplifier alone.

• Journal of Navigation and Port Research
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• v.30 no.5 s.111
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• pp.351-356
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• 2006

In this paper, the high efficiency Doherty power amplifier has been designed and realized for microwave applications. The Doherty amplifier has been implemented using silicon MRF 281 LDMOS FET. The RF performances cf the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone. The realized Doherty power amplifier P1dB output power has 33dBm at 2.3GHz frequency. Also the Doherty power amplifier shows 11dB gain and -17.8dB input return loss at 2.3GHz to 2.4GHz. The designed Doherty amplifier has been improved the average PAE by 10% higher efficiency than a class AB amplifier alone. The Maximum PAE of designed Doherty power amplifier has been 39%.

• Proceedings of the Korean Institute of Navigation and Port Research Conference
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• 2006.06b
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• pp.91-96
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• 2006

In this paper, the high efficiency Doherty power amplifier has been designed and realized for microwave applications. The Doherty amplifier has been implemented using silicon MRF 281 LOMOS FET. The RF performances of the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias..tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone. The realized Doherty power amplifier PldB output power has 33dBm at 2.3GHz frequency. Also the Doherty power amplifier shows 11dB gain and -17.8dB input return loss at 2.3GHz to 2.4GHz. The designed Doherty amplifier has been improved the average PAE by 10% higher efficiency than a class AB amplifier alone. The Maximum PAE of designed Doherty power amplifier has been 39%.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.5 s.347
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• pp.128-136
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• 2006

In this paper, design and implement 50W Doherty power amplifiers for 3GPP repeater and base station transceiver system. Efficiency improvement and high power property of ideal Doherty power amplifier is distinguishable; however bias control for implementation of Doherty(GDCHD) amplifier is difficult. To solve the problem, therefore, GDCHD(Gate and Drain Control Hybrid Doherty) power amplifier is embodied to drain bias adjustment circuit to Doherty power amplifier with gate bias adjustment circuit. Experiment result shows that $2.11{\sim}2.17\;GHz$, 3GPP operating frequency band, with 57.03 dB gain, PEP output is 50.30 dBm, W-CDMA average power is 47.01 dBm, and -40.45 dBc ACLR characteristic in 5MHz offset frequency band. Each of the parameter satisfied amplifier specification which we want to design. Especially, GDCHD power amplifier shows proper efficiency performance improvement in uniformity ACLR than Doherty power amplifier.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.8
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• pp.1847-1853
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• 2014

The PAPR of the input signal is increased due to OFDMA signal in a mobile communication system. High efficiency of a power amplifier, which accounts for power consumption, is a very important key technology. Digital Pre-Distortion techniques were used to improve the linearity of the power amplifier. The Asymmetric Doherty scheme was used to improve the efficiency of the power amplifier. In this paper, we propose a new structure of Asymmetric Doherty. Drive power amplifier part is separated as main path and peak path, and phase shifter is employed to improve power combine characteristics of the Doherty Amplifier. Also, envelope tracking technology for drive gate bais in drive peak amplifier is used to improve efficiency.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.2 s.332
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• pp.81-86
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• 2005

In this paper, the high linear Doherty amplifier has been realized by employing the PBG(Photonic Band Gap) structure. The PBG structure has been employed on the output matching network of the power amplifier. The proposed Doherty amplifier has been improved in PAE and IMD. The PAE has been $36.4\%$ and the IMD has been -24.5 dBc, respectively.

• Journal of Advanced Navigation Technology
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• v.18 no.3
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• pp.229-235
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• 2014

This paper presents the Doherty power amplifier with a digitally controlled analog predistorter circuit of Scintera Corp. to produce high power efficiency and high linearity performance. The analog predistorter improves the linearity performance because of controlling amplitude and phase values of input signal in order to improve intermodulation performance of power amplifier. Also, the power amplifier is designed by the Doherty technology to obtain the high efficiency performance. To validate the Scintera's analog predistorter, we are implemented the power amplifier with Doherty method at center frequency 2150 MHz. Compared with the balanced amplifier, the power amplifier is improved above 11% enhanced efficiency and more than 15 dB ACPR improvement.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.9
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• pp.783-789
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• 2015

This paper presents a Doherty power amplifier(DPA) operating in the 2.6 GHz band for long term evolution(LTE) systems. In order to achieve high efficiency, second and third harmonic impedances are controlled using a compact output matching network. The DPA was implemented using a gallium nitride high electron mobility transistor(GaN-HEMT) that has many advantages, such as high power density and high efficiency. The implemented DPA was measured using an LTE downlink signal with a 10 MHz bandwidth and 6.5 dB PAPR. The implemented DPA exhibited a gain of 13.1 dB, a power-added efficiency(PAE) of 57.6 %, and an ACLR of -25.7 dBc at an average output power of 33.4 dBm.