• 제목/요약/키워드: Hierarchical compensation capacitor control

검색결과 2건 처리시간 0.014초

A Topological Transformation and Hierarchical Compensation Capacitor Control in Segmented On-road Charging System for Electrical Vehicles

  • Liu, Han;Tan, Linlin;Huang, Xueliang;Guo, Jinpeng;Yan, Changxin;Wang, Wei
    • Journal of Power Electronics
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    • 제16권4호
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    • pp.1621-1628
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    • 2016
  • Experiencing power declines when the secondary coil is at the middle position between two primary coils is a serious problem in segmented on-road charging systems with a single energized segmented primary coil. In this paper, the topological transformation of a primary circuit and a hierarchical compensation capacitor control are proposed. Firstly, the corresponding compensation capacitors and receiving powers of different primary structures are deduced under the condition of a fixed frequency. Then the receiving power characteristics as a function of the position variations in systems with a single energized segmented primary coil and those with double segmented primary coils are analyzed comparatively. A topological transformation of the primary circuit and hierarchical compensation capacitor control are further introduced to solve the foregoing problem. Finally, an experimental prototype with the proposed topological transformation and hierarchical compensation capacitor control is carried out. Measured results show that the receiving power is a lot more stable in the movement of the secondary coil. It is a remarkable fact that the receiving power rises from 10.8W to 19.2W at the middle position between the two primary coils. The experimental are in agreement with the theoretical analysis.

Cell Signal Distribution Characteristics For High Density FeRAM

  • Kang, Hee-Bok;Park, Young-Jin;Lee, Jae-Jin;Ahn, Jin-Hong;Sung, Man-Young;Sung, Young-Kwon
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제4권3호
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    • pp.222-227
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    • 2004
  • The sub-bitline (SBL) sensing voltage of a cell and total cell array can be measured by the method of SBL voltage evaluation method. The MOSAID tester can collect all SBL signals. The hierarchical bitline of unit cell array block is composed of the cell array of 2k rows and 128 columns, which is divided into 32 cell array sections. The unit cell array section is composed of the cell array of 64 rows and 128 columns. The average sensing voltage with 2Pr value of $5{\mu}C/cm^2$ and SBL capacitance of 40fF is about 700mV at 3.0V operation voltage. That is high compensation method for capacitor size degradation effect. Thus allowed minimum 2Pr value for high density Ferroelectric RAM (FeRAM) can move down to about less than $5{\mu}C/cm^2$.