• Journal of Electrical Engineering and Technology
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• v.10 no.6
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• pp.2249-2255
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• 2015

The use of voltage source converter multi-terminal direct current (VSC-MTDC) systems is anticipated to increase from the introduction of wind farms and super grids in the near future. Effective control of the DC voltage in VSC-MTDC systems is an important research topic. This paper proposes a new dynamic reference-based voltage droop control to control the DC voltage in VSC-MTDC systems more effectively. The main merit of the dynamic reference-based voltage droop control is that it can reduce the steady-state error in conventional voltage droop control by changing references according to the system operating conditions. The performance of the proposed control was tested in a hardware-in-the-loop simulation (HILS) system based on the OPAL-RT real-time digital simulator and four digital signal processing boards.

• Journal of Institute of Control, Robotics and Systems
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• v.10 no.4
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• pp.371-376
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• 2004

Distributed Network Protocol Version 3.0 (DNP3.0) is the communication protocol developed for the interoperability between a RTU and a central control station of SCADA in the power utility industry. In this paper DNP3.0 is implemented by using HDL with FPGA and C program on Hitachi H8/532 processor. DNP3.0 is implemented from physical layer to network layer in hardware level to reduce the computing load on a CPU. Finally, the ASIC for DNP3.0 has been manufactured from Hynix Semiconductor. The commercial feasibility of the hardware through the communication test with ASE2000 and DNP Master Simulator is performed. The developed protocol becomes one of IP, and can be used to implement SoC for the terminal device in SCADA systems. Also, the result can be applicable to various industrial controllers because it is implemented in HDL.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1015-1018
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• 2003

As increasing the size and complexity of hard-ware and software system, more efficient design methodology has been developed. Especially design-reuse technique enables fast system development via integrating existing hardware and software. For this technique available hardware/software should be prepared as component-based parts, adaptable to various systems. This paper introduces a component-based VHDL analyzer allowing to be embedded in other applications, such as simulator, synthesis tool, or smart editor. VHDL analyzer parses VHDL description input, and performs lexical, syntactic, semantic checking, and finally generates intermediate-form data as the result. VHDL has full-features of object-oriented language such as data abstraction, inheritance, and polymorphism. To support these features special analysis algorithm and intermediate form is required. This paper summarizes practical issues on implementing high-performance/quality VHDL analyzer and provides its solution that is based on the intensive experience of VHDL analyzer development.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.6
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• pp.220-229
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• 1996

We presetn sytem-level simulation methodology as well as environment setup established for CDMA digtial cellular mobile station in an effort to verify CDMA modem ASIC design. To make the system-level simulation feasible, behavioral modeling of a microcontroller was first carried out with VHDL. In addition, models written in C language were also developed to provide ASIC with realistic input data. Finally, the netlist of CDMA modem ASIC was loaded on the a hardware accelerator, which was interfaced with VHDL simulator, and ismulation was performed by excuting the actual CDMA call processing software. Simulation resutls thus obtained were confirmed by comparing them with the emulation resutls from the actual system constructed on hardware modeler. these methods were proved to be effective in both discovering in advance malfunctions when embedded in the system or design errors of ASIC and reducing simulation time by a factor of as much as 20 in case of simulation at gate-level.

• Nuclear Engineering and Technology
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• v.44 no.2
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• pp.103-122
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• 2012

Significant advances in computational performance have occurred over the past two decades, achieved not only by the introduction of more powerful processors but the incorporation of parallelism in computer hardware at all levels. Simultaneous with these hardware and associated system software advances have been advances in modeling physical phenomena and the numerical algorithms to allow their usage in simulation. This paper presents a review of the advances in computer performance, discusses the modeling and simulation capabilities required to address the multi-physics and multi-scale phenomena applicable to a nuclear reactor core simulator, and present examples of relevant physics simulation codes' performances on high performance computers.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.62 no.6
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• pp.845-851
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• 2013

Because the existing control system has been operating for about 20 years, it is necessary to upgrade the system for stable and efficient operation. But, there is a difficulty in maintenance by difference of manufacturer of each main control systems for boiler, turbine and generator. This developed IMCS(Integrated Monitoring and Control System) consists of more than 10,000 inputs and outputs for large scale thermal power plant. This paper consists of the development journey of IMCS MBC(mill and burner control) ; core binary protection & monitoring logic including prevention circuit of boiler explosion & implosion. In this project, the IMCS for boiler, turbine and generator was developed on basis of one communications platform. In this paper, the whole journey of development of IMCS MBC is dealt with designing software and hardware, coding application software, and validating software and hardware.

• Journal of Institute of Control, Robotics and Systems
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• v.8 no.2
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• pp.185-192
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• 2002

A novel GPS initial synchronization scheme with low hardware complexity is proposed. The proposed method has the decomposed differential matched filter, which consists of 25% multiplier and adder of the conventional matched filter. This paper presents the generalized mean acquisition time of initial synchronization scheme with multiple correlator. It is shown that the proposed method, in spite of its low hardware complexity, has the equal performance to the conventional method. The performance of the proposed method is verified through the simulation test by the GPS simulator. It is shown that the proposed method prevents the squaring loss of non-coherent integration.

• Journal of the Korea Society of Computer and Information
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• v.20 no.10
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• pp.1-5
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• 2015

Based on the dual hardware and software with distributed recovery blocks, the centralized type fault tolerant store management system(SMS) was proposed. As a result of trade off study related to mutiplex hardware system design, dual single board computer(SBC) was adapted. To verify redundancy function of the proposed structure, the prototype SMS and weapon simulator were used. The proposed SMS operated normally without being affected by a primary SBC failure. The switching time from primary SBC to shadow SBC was within 200 ms. The reliability of the proposed SMS was predicted and compared with the non fault tolerant SMS, thereby it was proved that the proposed SMS has a higher reliability than the non fault tolerant system within effective range.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.1
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• pp.41-49
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• 2012

This paper describes the operation mode development for the grid-tied PMSG(permanent magnet synchronous generator) wind power system combined with a battery energy storage. The development of operation modes was carried out through simulations with PSCAD/EMTDC software and experiments with a 10kW hardware prototype. The detailed simulation models for PMSG wind power system and battery energy storage were developed using user-defined models programed with C-code. A 10kW hardware simulator was built and tested in connection with the local load and the utility power. The simulation and experimental results confirm that the grid-tied PMSG wind power system combined with battery energy storage can supply highly reliable power to the local load in various operation modes.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1094_1095
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• 2009

최근 분산전원 시스템들이 가정이나 공공기관 등에 많이 설치되면서 계통에 많은 문제점을 일으키고 있다. 이러한 문제점을 연구하기 위해서는 계통 등의 실제 시스템을 설치하여 실험을 하여야 하는데 학교 연구실 입장에서는 실제 시스템을 설치하여 실험하는데 한계가 있다. 그러나 실시간 전력 계통 모의장치 (Real Time Digital Simulator)를 이용하여 실시간으로 시스템을 시뮬레이션 할 경우 다양한 알고리즘의 적용이 가능하고, 고장, 전력계통 과도현상 등 계통에 일어날 수 있는 여러 가지 상황을 손쉽게 고려해 보는 것이 가능하다. 본 논문에서는 RTDS 내 계통 연계형 태양광 발전시스템을 실제 시스템과 유사하게 모델링하고, 실제 DSP (Digital Signal Processor) 를 이용하여 시스템을 실시간으로 운전하는 HILS (Hardware In the Loop System) 시스템을 구성하였다.