• Title/Summary/Keyword: Hardware simulator

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COSIM(HARDWARE-SOFTWARE COSIMULATOR): JAVABEANS-BASED TOOL FOR WEB APPLICATIONS

  • Lee, Kangsun;Jaeho Jung;Youngsuk Hwang
    • Proceedings of the Korea Society for Simulation Conference
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    • 2001.10a
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    • pp.354-358
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    • 2001
  • Cosim (Hardware and Software Co-Simulator) is a JavaBeans-based simulation tool fur validating systems architecture and estimating performance of web applications. Cosim has four components: Modeler, Translator, Engine and Scenario. Users start from Modeler to describe systems architecture in UML(Unified Modeling Language) deployment diagram, and then specify hardware & software performance parameters such as execution delay, network topology, and frame size. All information specified on Modeler are sent to Translator, and then automatically converted to Java programs. Scenario is responsible to run the Java program and produce results in text reports and graphs. Developers can reduce development time and cost by validating systems architecture of web applications before the actual deployment.

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MultiRing An Efficient Hardware Accelerator for Design Rule Checking (멀티링 설계규칙검사를 위한 효과적인 하드웨어 가속기)

  • 노길수;경종민
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.24 no.6
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    • pp.1040-1048
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    • 1987
  • We propose a hardware architecture called Multiring which is applicable for various geometrical operations on rectilinear objects such as design rule checking in VLSI layout and many image processing operations including noise suppression and coutour extraction. It has both a fast execution speed and extremely high flexibility. The whole architecture is mainly divided into four parts` I/O between host and Multiring, ring memory, linear processor array and instruction decoder. Data transmission between host and Multiring is bit serial thereby reducing the bandwidth requirement for teh channel and the number of external pins, while each row data in the bit map stored in ring memory is processed in the corresponding processor in full parallelism. Each processor is simultaneously configured by the instruction decoder/controller to perform one of the 16 basic instructions such as Boolean (AND, OR, NOT, and Copy), geometrical(Expand and Shrink), and I/O operations each ring cycle, which gives Multiring maximal flexibility in terms of design rule change or the instruction set enhancement. Correct functional behavior of Multiring was confirmed by successfully running a software simulator having one-to-one structural correspondence to the Multiring hardware.

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Analog MPPT for grid connected single-phase system (계통 연계 단상 시스템을 위한 아날로그 MPPT)

  • Ahn J.Y.;Park J.H.;Cho B.H.;Yoo G.J.
    • Proceedings of the KIPE Conference
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    • 2003.07b
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    • pp.785-788
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    • 2003
  • In this paper , the simple MPPT(Maximum Power Point Tracking) control algorithm is proposed for the grid-connected photovoltaic power system. This method uses the difference in the slope of the solar array voltage range below the MPP and above the MPP. This simple the algorithm enables the hardware implementation achieved by only analog devices. The proposed MPPT algorithm is verified by the hardware experiment using 500[W] solar away simulator, simplified inverter model hardware set, and rectified grid-line.

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Development of Hardware-in-the-Loop Simulation System for Use in Design and Validation of VDC Logics

  • Park, Kihong;Heo, Seung-Jin
    • International Journal of Precision Engineering and Manufacturing
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    • v.4 no.3
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    • pp.28-35
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    • 2003
  • The objective of the Vehicle Dynamics Control (VDC) system is to maintain vehicle stability under critical lateral motions, It has a good potential of becoming one of the chassis control necessities since the system can be realized with little additional cost on top of the ABS/TCS system, Developed in this research is a hardware-in-the-loop simulator for VDC with a valve control system that modulates the brake pressures at four wheels: Two VDC control logics, a simple control logic and an LQR control logic, have been developed and incorporated in the HILS system. Their performance under various driving conditions was tested in the HILS system and the results are presented.

편대비행 위성의 자세 동기화를 위한 SDRE 추적 제어기와 Hardware-In-the-Loop 시뮬레이션

  • Jeong, Jun-O;Park, Sang-Yeong
    • Bulletin of the Korean Space Science Society
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    • 2010.04a
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    • pp.31.2-31.2
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    • 2010
  • 편대비행 위성이 공동의 임무를 수행하기 위해서는 편대를 이루는 위성의 각기 다른 초기 오차와 다양한 외란 환경에서도 자세 동기화를 이룰 수 있는 기법이 필요하다. 이 연구에서는 편대비행위성의 자세 동기화를 위하여 비선형 시스템에 대한 준최적 제어기법인 SDRE(State-Dependent Riccati Equation)에 기반한 추적 제어기가 사용되었다. 반작용 휠이 포함된 위성의 자세 동역학이 SDRE 추적 제어기를 구성하는데 이용된다. 이를 Leader/Follower 편대비행 시스템에 적용하며, 기준 자세를 추적하는 Leader 위성의 자세를 Follower 위성이 추적하여 자세 동기화를 이룰 수 있다. MATLAB과 SIMULINK를 이용한 수치해석적 시뮬레이션으로 추적 제어기의 성능을 검증하였으며, 이에 대한 실시간 HIL(Hardware-In-the-Loop) 시뮬레이션이 수행되었다. 무중력 환경을 모사하는 에어베어링시스템과 세 개의 반작용 휠을 장착한 자세제어 HILS(Hardware-In-the-Loop Simulator)는 PC104 타입의 임베디드 컴퓨터에서 SIMULINK의 xPC Target을 이용한 실시간 시뮬레이션 환경을 제공하며, 이에 적용되는 SDRE 추적 제어기는 이산화되어 설계되었다. 또한 SDRE 추적 제어기에 대한 안정성을 보장하는 영역이 추정되어 위 추적 제어기가 위성 편대비행에 적합한 자세 동기화 기법임을 보였다.

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PHLIS-Based Characteristics Analysis of a 2 MW Class Tidal Current Power Generation System (PHILS 기반 2 MW급 조류발전시스템 특성 분석)

  • Go, Byeong Soo;Sung, Hae Jin;Park, Minwon;Yu, In Keun
    • Journal of the Korean Society for Precision Engineering
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    • v.31 no.8
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    • pp.665-670
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    • 2014
  • In this paper, characteristics of a tidal current power generation system are analysis using power hardware-in-the-loop simulation (PHILS). A 10 kW motor generator set is connected to the real grid through a fabricated 10 kW back to back converter. A power control scheme is applied to the back to back converter. A 2 MW class tidal current turbine is modeled in real time digital simulator (RTDS). Generating voltage and current from the 10 kW PMSG is applied to a 2 MW class tidal current turbine in the RTDS using PHILS. The PHILS results depict the rotation speed, power coefficient, pitch angle, tip-speed ratio, and output power of tidal current turbine. The PHILS results in this paper can contribute to the increasing reliability and stability of the tidal current turbines connected to the grid using PHILS.

Implementation of H.264/SVC Decoder System based on C-Model Simulator (C-모델 시뮬레이터 기반 H.264/SVC 복호기 시스템 구현)

  • Cheong, Cha-Keon;Gil, Dae-Nam
    • The Journal of the Korea Contents Association
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    • v.9 no.2
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    • pp.27-35
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    • 2009
  • In this paper, we present result of embedded system based H.264/SVC decoder circuit design and system implementation. To deal with the standardized H.264/SVC functionalities, the presented SVC decoder system is consist of hardware engine design and software with ARM core processor. In order to improve the feasibility and applicability, and reduce the decoder complexity, the implemented system is constructed with only the consideration of IPPP structure scalability without using the full B-picture architecture. Finally, we will show the decoding image result using the designed H.264/SVC decoder system.

Transient Characteristic Analysis on the Regenerative Braking System of Fuel-cell Electric Vehicle with Electro-Hydraulic Brake (전기유압식 브레이크를 장착한 연료전지차량의 회생제동 천이구간 특성해석)

  • Choi, Jeong-Hun;Cho, Bae-Kyoon;Park, Jin-Hyun;Hwang, Sung-Ho
    • Journal of Drive and Control
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    • v.9 no.1
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    • pp.1-9
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    • 2012
  • Nowadays, various researches about eco-friendly vehicles such as hybrid electric vehicle, fuel cell vehicle and electric vehicle have been actively carried out. Since most of these green cars have electric motors, the regenerative energy technology can be used to improve the fuel economy and the energy efficiency of vehicles. The regenerative brake is an energy recovery mechanism which slows a vehicle by converting its kinetic energy into electric energy, which can be either used immediately or stored until needed. This technology plays a significant role in achieving the high energy usage. However, there are some technical problems for controlling the regenerative braking and the electro-hydraulic brake during switching at transient region. In this paper, the performance simulator for fuel-cell vehicle is developed and transient response characteristics of the regenerative braking system are analyzed in the various driving situations. And the hardware-in-the-loop simulation of electro-hydraulic brake is performed to validate the transient characteristics of the regenerative braking system for fuel-cell electric vehicle.

Development of VDS for Geosynchronous Satellite and Verification using PILS & HILS (정지궤도위성 실시간 동역학 시뮬레이터 개발 및 연동시험을 통한 검증)

  • Park, Yeong-Ung;Gu, Ja-Chun;Choe, Jae-Dong;Gu, Cheol-Hoe;Park, Bong-Gyu
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.34 no.1
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    • pp.103-109
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    • 2006
  • In this paper, VDS(Vehicle Dynamics Simulator) and ACS(Attitude Control Simulator) are developed and are verified using PILS(Process In-the Loop Simulation) between VDS and ACS. VDS is including the AOCS(Attitude & Orbit Control Subsystem) hardware modeling of geosynchronous satellite and consists of modulation concept. ACS performs the attitude determination using sensor data and generates the attitude control commands. In order to transfer the data between VDS and PCDU(Power Control & Distribution Unit), data acquisition boards were mounted. VDS performance is verified using HILS(Hardware In-the Loop Simulation) between VDS and PCDU.

Development of a Lane Keeping Assist System using Vision Sensor and DRPG Algorithm (비젼센서와 DRPG알고리즘을 이용한 차선 유지 보조 시스템 개발)

  • Hwang, Jun-Yeon;Huh, Kun-Soo;Na, Hyuk-Min;Jung, Ho-Gi;Kang, Hyung-Jin;Yoon, Pal-Joo
    • Transactions of the Korean Society of Automotive Engineers
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    • v.17 no.1
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    • pp.50-57
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    • 2009
  • Lane Keeping Assistant Systems (LKAS) require the cooperative operation between drivers and active steering angle/torque controllers. An LKAS is proposed in this study such that the desired reference path generation (DRPG) system generates the desired path to minimize the trajectory overshoot. Based on the reference path from the DRPG system, an optimal controller is designed to minimize the cost function. A HIL (Hardware In the Loop) simulator is constructed to evaluate the proposed LKAS system. The single camera is mounted on the simulator and acquires the monitor images to detect lane markers. The performance of the proposed system is evaluated by HIL system using the Carsim and the Matlab Simulink.