• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2011년도 추계학술대회
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• pp.817-819
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• 2011

Most of the sources of security and privacy issues in RFID technology arise from the violation of the air interface between a tag and its read. Most of the sources of security and privacy issues in RFID technology arise from the violation of the air interface between a tag and its reader. This paper will approach consideration of security analysis with cryptographic primitive based on hardware basis.

• 전기전자학회논문지
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• 제24권2호
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• pp.497-501
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• 2020

안개가 낀 악조건의 날씨에서도 자율주행 및 지능형 CCTV가 정상적으로 동작하기 위해 안개 제거 기술이 필수적이다. 안개 제거 기술에서도 특히 대기강도 추정 방법이 중요하다. 본 논문에서는 불필요한 연산량을 줄이고 여러 가지 입력 영상에서도 효과적으로 대기강도를 추정할 수 있는 패치 기반 대기강도 추정 알고리즘과 하드웨어 구조를 제안한다. 알고리즘은 대중적으로 널리 사용되는 쿼드트리 방식과 비교했으며, 하드웨어 설계는 국제 표준 4K 영상에 실시간 대응할 수 있는 구조로써 XILINX사의 xc7z045-ffg900 목표 보드를 사용하여 FPGA 검증을 했다.

• 제어로봇시스템학회논문지
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• 제13권7호
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• pp.694-702
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• 2007

The SSWM(Software Switching Mechanism) of I-processor concept using non-real time in-house software simulation program is an effective method in order to develop the flight control law in desktop or HQS environment. And, this system has some advantages compare to HSWM(Hardware Switching Mechanism) such as remove the time delay effectiveness and reduce the costs of development. But, if this system loading to the OFP(Operational Flight Program), the OFP guarantee the enough throughput in order to calculate the two control law at once. Therefore, the HSWM(Hardware Switching Mechanism) of 2-processor concept is necessary. This paper addresses the concept of HSWM of the HQS-PC interface using TCP/IP(Transmission Control Protocol/Internet Protocol) communication based on flight control law of advanced supersonic trainer. And, the fader logic of TFS(Transient Free Switch) and stand-by mode of reset '0' type are designed in order to reduce the abrupt transient response and minimize the integrator effect in pitch axis. The result of the analysis based on HQS pilot simulation using HSWM reveals that the flight control systems are switching between two computers without any problem.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2008년도 추계종합학술대회 B
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• pp.100-103
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• 2008

본 논문에서는 AMBA 기반으로 사용될 수 있는 H.264용 Encoder Hardware 모듈(Intra Prediction, Deblocking Filter, Context-Based Adaptive Variable Length Coding, Motion Estimation)을 Integration하여 설계하였다. 설계된 모듈은 한 매크로 블록당 최대 440 cycle내에 동작한다. 제안된 Encoder 구조를 검증하기 위하여 JM 9.4부터 reference C를 개발하였으며, reference C로부터 test vector를 추출하며 설계 된 회로를 검증하였다. 제안된 회로는 최대 166MHz clock에서 동작하며, 합성결과 Charterd 0.18um 공정에 램 포함 약 180만 gate 크기이다. MPW제작시 chip size $6{\times}6mm$의 크기와 208 pin의 Pakage 형태로 제작하였다.

• 한국정보통신학회논문지
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• 제13권12호
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• pp.2647-2654
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• 2009

본 논문에서는 AMBA 기반으로 사용될 수 있는 H.264용 Encoder Hardware 모듈 (Intra Prediction, Deblocking Filter, Context-Based Adaptive Variable Length Coding, Motion Estimation)을 Integration하여 설계하였다. 설계된 모듈은 한 매크로 블록당 최대 440 cycle내에 동작한다. 제안된 인코더 구조를 검증하기 위하여 JM 9.4부터 reference C를 개발하였으며, reference C로부터 test vector를 추출하여 설계 된 회로를 검증하였다. 제안된 회로는 최대 166MHz clock에서 동작하며, 합성결과 Charterd 0.18 um 공정에 램 포함 약 173만 gate 크기이다. MPW제작시 chip size $6{\times}6mm$의 크기와 208 pin의 Package 형태로 제작 하였다.

• 전자통신동향분석
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• 제33권6호
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• pp.58-68
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• 2018

A neuromorphic hardware that mimics biological perceptions and has a path toward human-level artificial intelligence (AI) was developed. In contrast with software-based AI using a conventional Von Neumann computer architecture, neuromorphic hardware-based AI has a power-efficient operation with simultaneous memorization and calculation, which is the operation method of the human brain. For an ideal neuromorphic device similar to the human brain, many technical huddles should be overcome; for example, new materials and structures for the synapses and neurons, an ultra-high density integration process, and neuromorphic modeling should be developed, and a better biological understanding of learning, memory, and cognition of the brain should be achieved. In this paper, studies attempting to overcome the limitations of next-generation neuromorphic hardware technologies are reviewed.

• 정보보호학회논문지
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• 제14권6호
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• pp.79-89
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• 2004

지문 식별은 데이터베이스에 사용자의 지문 정보를 저장하는 사용자 등록 과정과 입력된 사용자의 지문 정보에 대하여 유사한 후보자 목록을 작성하는 식별 과정으로 구성된다. 그러나 대규모 데이터베이스에 저장된 사용자 지문 정보를 전체적으로 순차 검색할 경우 오랜 수행 시간이 요구된다는 문제가 있다. 이러한 문제점을 해결하기 위하여 본 논문에서는 실시간으로 지문을 식별하기 위한 지문 식별 전용 하드웨어를 설계하였다. 설계된 지문 식별 전용 하드웨어는 PCI 보드에 대용량 FPGA와 SDRAM을 실장하여 지문 검색을 병렬로 처리한다. 설계된 하드웨어에 대한 성능평가 결과, 등록자 수 증가에 따른 높은 확장성을 보이며 지문 식별을 실시간에 처리할 수 있음을 확인하였다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제14권12호
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• pp.4648-4663
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• 2020

This paper proposes the Lempel-Ziv 4(LZ4) compression accelerator optimized for scale-out servers in data centers. In order to reduce CPU loads caused by compression, we propose an accelerator solution and implement the accelerator on an Field Programmable Gate Array(FPGA) as heterogeneous computing. The LZ4 compression hardware accelerator is a fully pipelined architecture and applies 16 dictionaries to enhance the parallelism for high throughput compressor. Our hardware accelerator is based on the 20-stage pipeline and dictionary architecture, highly customized to LZ4 compression algorithm and parallel hardware implementation. Proposing dictionary architecture allows achieving high throughput by comparing input sequences in multiple dictionaries simultaneously compared to a single dictionary. The experimental results provide the high throughput with intensively optimized in the FPGA. Additionally, we compare our implementation to CPU implementation results of LZ4 to provide insights on FPGA-based data centers. The proposed accelerator achieves the compression throughput of 639MB/s with fine parallelism to be deployed into scale-out servers. This approach enables the low power Intel Atom processor to realize the Hadoop storage along with the compression accelerator.

• 한국자동차공학회논문집
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• 제6권3호
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• pp.45-53
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• 1998

Traction control systems(TCS) improve vehicle acceleration performance and stability, particularly on slippery roads through engine torque and/or brake torque control. This research mainly deals with the engine control algorithm based on adjustment of the engine throttle valve opening. Hardware-in-the-loop simulation(HWILS) is carried out where the actual hardware is used for the engine/automatic transmission and TCS controller, while various vehicle dynamics are simulated on real-time basis. Also, use of the dynamometer is made in order to implement the tractive force that a road applies to the tire. Although some restrictions are imposed mainly due to the capability of the synamometer, simplified HWILS results show that the slip control algorithm can improve the vehicle acceleration performance for low-friction roads.

• 한국자동차공학회논문집
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• 제6권2호
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• pp.155-167
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• 1998

The prevalence of microprocessor-based controllers in automotive systems has greatly increased the meed for tools which can be used to validate and test control systems over their full range of operation. The objective of this paper is to develop a real time simulator of an anti-lock braking system and the methodology of using hardware-in-the-loop simulation based on a personal computer. By use of this simulator, the analyses of a commercial electronic control unit as well as the validation of the developed control logics for ABS were performed successfully. The simulator of this research can be traction applied to development of more advanced control system, such as traction control systems, vehicle dynamic control system and so forth.