• Title/Summary/Keyword: Hardware acceleration

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Optimal Design for a Structure Using Design of Experiment (실험계획법을 이용한 구조물의 최적설계)

  • 고성호;한석영;최형연
    • Proceedings of the Korean Society of Machine Tool Engineers Conference
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    • 2001.04a
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    • pp.34-39
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    • 2001
  • The median barrier is one of the roadside hardware to prevent severe human and property damage from highway traffic accidents. The foreign standard of concrete median barrier was introduced and implemented without modification fitting to domestic vehicle and highway condition. In a car accident, median barrier doesn't protect vehicle effectively, especially for heavy vehicle such as bus and heavy truck. The purpose of this study is to develop the optimal performance design of concrete median barrier using the design of experiment with crash simulation analysis which is done by Pam-Crash that is one of the commercial crash simulation software. As a result of this study, an optimal design of concrete median barrier is obtained considering von Mises stress, volume and COG acceleration of truck.

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Dynamic Simulation of Engine Torque for Hardware-in-the-loop Simulation (엔진 토크의 동적 시뮬레이션에 관한 연구)

  • 조한승;송해박;이종화;고상근
    • Transactions of the Korean Society of Automotive Engineers
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    • v.5 no.2
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    • pp.94-110
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    • 1997
  • In the present study, a mean torque predictive model has been proposed and experimentally validated. It includes induction air mass model, fuel delivery model and mean production mode. Air induction and fuel delivery model considering dynamic behaviors of air induction and fuel delivery were proposed to predict the air-fuel ratio excursions under transient condition. Torque function model reflects thermal efficiency, volumetric efficiency, friction and effect of spark timing. In the spark timing model, knock limit and acceleration retard are included. Experiments were carried out to validate the simulation model for the step changes of throttle at constant engine speed. The results show reasonable agreements between simulation and experiment at fully warmed condition. Using this model, fueling strategies are varied with fast throttle open and it can predict air-fuel ratio excursion and IMEP.

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The Development of Digital FHR Monitoring System Using PC and DSP (PC와 디지탈 신호 처리기를 이용한 디지탈 FHR 감시 장치의 개발)

  • Chung, Ji-H.;Kim, Sun-I.;Park, Moon-I.;Lee, Doo-S.
    • Proceedings of the KOSOMBE Conference
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    • v.1991 no.11
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    • pp.79-82
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    • 1991
  • Digital FHR monitoring system based on the personal computer combined wi th the digital signal processing (DSP) board was implemented. The DSP board acquires and digitally processes ultrasound fetal Doppler signal for digital rectification, envelope detection, autocorrealtion function calculation and its peak position detection. The personal computer interfaced with the DSP board is in charge of graphic display, hardcopy, data taransmission and on-line analysis of fetal heart rate change including on-line warning system, base-line estmation, acceleration, deceleration and variability. The advantages of PC-DSP based system can be summarized as follows: 1) Minimum hardware realization. 2) Increased flexibility. 3) Total care system.

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HYBRID ROLL CONTROL USING ELECTRIC ARC SYSTEM CONSIDERING LIMITED BANDWIDTH OF ACTUATING MODULE

  • Kim, H.J.;Lee, C.R.
    • International Journal of Automotive Technology
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    • v.3 no.3
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    • pp.123-128
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    • 2002
  • This paper presents the design of an active roll control system for a ground vehicle and an experimental study using an devised electric-actuating roll control system. Based on a three degree of freedom linear vehicle model, the controller is designed using lateral acceleration and rollrate feedback. In order to investigate the feasibility of an active control system, experimental work is carried out using a hardware-in-the-loop (Hil) setup which has been constructed by the devised electric-actuating system and the full vehicle model including tire characteristics. The performance is evaluated by an experiment using the Hil setup with limited bandwidth. Finally, in order to enhance the control performance in the transient region, a hybrid control strategy is proposed and evaluated.

On the Development of Seakeeping Performance Evaluation System with Establishing a Safety Space (안전공간 설계에 의한 선박 내박성능의 평가 시스템 개발에 관한 연구)

  • 김순갑;공길영
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • 1992.04a
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    • pp.21-43
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    • 1992
  • The recently-developed automated vessels require a system which evaluates the operating condition of the ship at present position form weather information as well as sensors; forecasts the operation condition the sea state to come in foreseeable future ; and suggests the optimum course and speed for ship's sa-fety. According to a study deck wetness propeller racing slamming rolling vertical acceleration lateral acce-leartion vertical bending moment at midship etc. were chosen as the factors for evaluating seakeeping per-formance. As a mater of fact there is no developing the hardware of a system which could consider all the factors onseakeeping performance. This study introduces a theoretical method which makes it possible to evaluate the seakeeping perfor-mance byapplying a theory from reliability engineering and thereby establishing a safety space. lation of stochastic processes with the factors presently adopted for evaluating sekakeeping performance. and develops the overall eseakeeping performance evaluation system in consideration of the safety of human being cargoes and the ship This method of evaluation shall be of much use in developing the practical system of seakeeping perfor-mance of a ship in waves.

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Gun fire Control System Design with Maneuvering Target State Estimates (기동표적의 상태추정을 이용한 포의 사격통제 시스템 향상 연구)

  • Lee, Dong-Gwan;Song, Taek-Lyul;Han, Du-Hee
    • The Transactions of the Korean Institute of Electrical Engineers D
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    • v.55 no.3
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    • pp.98-109
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    • 2006
  • Fire control system(FCS) errors can be classified as hardware errors, filter prediction errors, effective ballistic function errors, and aiming errors. Among these errors, the filter prediction errors are the most significant error sources. To reduce them, a target future position calculation method using the acceleration estimate is suggested and it is compared with the constant velocity target prediction method. Simulation results show that the suggested method has better performance than the constant velocity prediction method. Target tracking algorithm is established with multiple target tracking filters based on IMM structure.

A Simulation for the Train Automatic Operation Control System (전동차의 자동운전제어 시스템에 관한 시뮬레이션 기술)

  • 한성호;윤용기;안태기;김원경;조연옥
    • Proceedings of the KSR Conference
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    • 1998.11a
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    • pp.255-261
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    • 1998
  • The train automatic operation control system is an on-board train control system that is widely adopted in modern rapid transit systems. The control system consists of TCMS(Train Control and Monitoring System), ATC(Automatic Train Control), ATO(Automatic Train Operation) and TWC(Train to wayside communication) in the train and wayside facilities. The functions of the system is to regulate train riding comfort, to service limited speed and smoothness during start, acceleration, constant speed travel, and fixed point parking under the corresponding commands. The paper describes the simulation model of the train automatic operation control of subway system, configuration of simulator hardware and software and operational algorithms.

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Face-Mask Detection with Micro processor (마이크로프로세서 기반의 얼굴 마스크 감지)

  • Lim, Hyunkeun;Ryoo, Sooyoung;Jung, Hoekyung
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.3
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    • pp.490-493
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    • 2021
  • This paper proposes an embedded system that detects mask and face recognition based on a microprocessor instead of Nvidia Jetson Board what is popular development kit. We use a class of efficient models called Mobilenets for mobile and embedded vision applications. MobileNets are based on a streamlined architechture that uses depthwise separable convolutions to build light weight deep neural networks. The device used a Maix development board with CNN hardware acceleration function, and the training model used MobileNet_V2 based SSD(Single Shot Multibox Detector) optimized for mobile devices. To make training model, 7553 face data from Kaggle are used. As a result of test dataset, the AUC (Area Under The Curve) value is as high as 0.98.

Parallel Implementation of Scrypt: A Study on GPU Acceleration for Password-Based Key Derivation Function

  • SeongJun Choi;DongCheon Kim;Seog Chung Seo
    • Journal of information and communication convergence engineering
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    • v.22 no.2
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    • pp.98-108
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    • 2024
  • Scrypt is a password-based key derivation function proposed by Colin Percival in 2009 that has a memory-hard structure. Scrypt has been intentionally designed with a memory-intensive structure to make password cracking using ASICs, GPUs, and similar hardware more difficult. However, in this study, we thoroughly analyzed the operation of Scrypt and proposed strategies to maximize computational parallelism in GPU environments. Through these optimizations, we achieved an outstanding performance improvement of 8284.4% compared with traditional CPU-based Scrypt computations. Moreover, the GPU-optimized implementation presented in this paper outperforms the simple GPU-based Scrypt processing by a significant margin, providing a performance improvement of 204.84% in the RTX3090. These results demonstrate the effectiveness of our proposed approach in harnessing the computational power of GPUs and achieving remarkable performance gains in Scrypt calculations. Our proposed implementation is the first GPU implementation of Scrypt, demonstrating the ability to efficiently crack Scrypt.

An Embedded FAST Hardware Accelerator for Image Feature Detection (영상 특징 추출을 위한 내장형 FAST 하드웨어 가속기)

  • Kim, Taek-Kyu
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.49 no.2
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    • pp.28-34
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    • 2012
  • Various feature extraction algorithms are widely applied to real-time image processing applications for extracting significant features from images. Feature extraction algorithms are mostly combined with image processing algorithms mostly for image tracking and recognition. Feature extraction function is used to supply feature information to the other image processing algorithms and it is mainly implemented in a preprocessing stage. Nowadays, image processing applications are faced with embedded system implementation for a real-time processing. In order to satisfy this requirement, it is necessary to reduce execution time so as to improve the performance. Reducing the time for executing a feature extraction function dose not only extend the execution time for the other image processing algorithms, but it also helps satisfy a real-time requirement. This paper explains FAST (Feature from Accelerated Segment Test algorithm) of E. Rosten and presents FPGA-based embedded hardware accelerator architecture. The proposed acceleration scheme can be implemented by using approximately 2,217 Flip Flops, 5,034 LUTs, 2,833 Slices, and 18 Block RAMs in the Xilinx Vertex IV FPGA. In the Modelsim - based simulation result, the proposed hardware accelerator takes 3.06 ms to extract 954 features from a image with $640{\times}480$ pixels and this result shows the cost effectiveness of the propose scheme.