• Journal of the Korean Institute of Intelligent Systems
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• v.11 no.8
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• pp.746-753
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• 2001

In this paper, we review the basic concept of Evolvable Hardware first. And we examine genetic algorithm processor and hardware reconfiguration method and implementation. By considering complexity and performance of hardware at the same time, we design genetic algorithm processor using modularization and parallel processing method. And we design frame that has connection structure and logic block on FPGA, and embody reconfigurable hardware that do so that this frame may be reconstructed by RAM. Also we implemented ECANS that information processing system such as living creatures'brain using this hardware reconfiguration method. And we apply ECANS which is implemented using the concept of Evolvable Hardware to time-series prediction problem in order to verify the effectiveness.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.12
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• pp.1688-1696
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• 2020

The paradigm of Internet-of-things(IoT) systems is changing from a cloud-based system to an edge-based system to solve delays caused by network congestion, server overload and security issues due to data transmission. However, edge-based IoT systems have fatal weaknesses such as lack of performance and flexibility due to various limitations. To improve performance, application-specific hardware can be implemented in the edge device, but performance cannot be improved except for specific applications due to a fixed function. This paper introduces a edge-centric metamorphic IoT(mIoT) platform that can use a variety of hardware through on-demand partial reconfiguration despite the limited hardware resources of the edge device, so we can increase the performance and flexibility of the edge device. According to the experimental results, the edge-centric mIoT platform that executes the reconfiguration algorithm at the edge was able to reduce the number of server accesses by up to 82.2% compared to previous studies in which the reconfiguration algorithm was executed on the server.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.12
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• pp.1244-1252
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• 2008

This paper presents the analysis results obtained by the flight test of reconfiguration flight control system for an aircraft. The reconfiguration flight control system was designed by using control allocation scheme that automatically distributes the demanded control moments determined by control law to each actual control surface. In this paper, some control allocation algorithms for reconfiguration control of general aircraft with redundant control surfaces are summarized and their performance evaluation results through nonlinear simulation and Hardware-In-the-Loop-Simulation (HILS) test are shown. Also, Unmanned Aerial Vehicle (UAV) system adopted as a platform for the flight test of reconfiguration flight controller and the implementation procedure of reconfiguration flight controller into real-time UAV system were introduced. Finally, flight test results were analyzed.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.5
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• pp.188-202
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• 1996

In this paper, we propose a symmetrical pseudo faulty processing elements genration technique to improve the overall reliability of arrays with fixed hardware resources on the fault tolerant VLSI arrays based on single-track switches. We have analyzed the reliability of fault tolerant VLSI arrays and designed control logic for real-tiem reconfiguration. Applying this technique to reconfiguration of VLSI 2-D arrays, we have found that the proposed scheme achieves a higher reliability than the previus methods of similar condition. And we have found that the results of reliability analyzed by mathematic computation are very close to simulated ones. Furthermore, the time overhead for reconfiguration is independent of the array size because the control for reconfiguration is distributively executed by each processing elements. And the proposed scheme has an advantage which maintained properties of VLSI arrays by keeping the locality of interconnections as high as possible even after the reconfiguration.

• Journal of Institute of Control, Robotics and Systems
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• v.10 no.10
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• pp.899-906
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• 2004

In this paper, fault tolerant algorithm is presented for a servo manipulator system. For fault tolerance of a servo manipulator system, reconfiguration algorithm accommodating a motor's failure has been presented. The algorithm considers a transport's degree of freedoms as redundant joints of a servo manipulator. The reconfiguration algorithm recovers the end effector's motion in spite of one motor's failure A modified pseudo inverse redistribution method has been proposed for the reconfiguration algorithm. Numerical examples and hardware tests have been presented to verify the proposed methods.

• Journal of Korea Society of Digital Industry and Information Management
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• v.14 no.4
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• pp.87-92
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• 2018

One of the problems with the base station equipment is that there is a large difference between the replacement time of the hardware equipment such as the base station equipment and the radio access equipment, and the evolution period of the communication standard. Therefore, the base station communication platform must be flexible enough to handle the evolving communication standards after purchase. Recent research on reconfigurable communications platforms has focused on the efficient architecture of the communications platform to meet these requirements through software downloads while still using existing hardware. This paper presents a prototype of a base station communications platform based on the ETSI standard reconfigurable architecture. The communication platform presented in this paper is implemented as an ETSI standard reconfigurable architecture using a general-purpose DSP (Digital Signal Processor). In the implemented prototype, we verify the real-time feasibility of communication protocol updates through software reconfiguration.

• Journal of KIISE:Computing Practices and Letters
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• v.11 no.6
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• pp.465-476
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• 2005

In this paper, we propose a new dynamic reconfiguration method using application-level checkpointing in a grid computing environment with Cactus and Globus. The existing dynamic reconfiguration methods have been dependent on a specific hardware and operating system. But the proposed method performs a dynamic reconfiguration without supporting specific hardwares and operating systems and, an application is programmed without considering a dynamic reconfiguration. In the proposed method, the job starts with an initial configuration of Computing resources and the job restarts including new resources dynamically found at run-time. The proposed method determines whether to include the newly found idle sites by considering processor performance and available memory of the sites. Our method writes the intermediate results of the job on the disks using system-independent application-level checkpointing for real-time visualization during the job runs. After reconfiguring idle sites and idle processors newly found, the job resumes using checkpointing files. The proposed dynamic reconfiguration method is proved to be valid by decreasing total execution time In K*Grid.

• 제어로봇시스템학회:학술대회논문집
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• 2003.10a
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• pp.2467-2470
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• 2003

In this paper, fault tolerant mechanisms are presented for a servo manipulator system designed to operate in a hot cell. A hot cell is a sealed and shielded room to handle radioactive materials, and it is dangerous for people to work in the hot cell. So, remote operations are necessary to handle radioactive materials in the hot cell. KAERI has developed a servo manipulator system to perform such remote operations. However, since electric components such as servo motors are weak to radiations, fault tolerant mechanisms have to be considered. For fault tolerance of the servo manipulator system, hardware and software redundancy have been considered. In case of hardware, radioactive resistant electric components such as cables and connectors have been adopted and motors driving a transport have been duplicated. In case of software, a reconfiguration algorithm accommodating one motor's failure has been developed. The algorithm uses redundant axis to recover the end effector's motion in spite of one motor's failure.

• Proceedings of the KSME Conference
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• 2003.11a
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• pp.1464-1469
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• 2003

In this paper, fault tolerant mechanisms are presented for a servo manipulator system designed to operate in a hot cell. A hot cell is a sealed and shielded room to handle radioactive materials, and it is dangerous for people to work in the hot cell. So, remote operations are necessary to handle the radioactive materials in the hot cell. KAERI has developed a servo manipulator system to perform such remote operations. However, since electric components such as servo motors are weakened with radiation, fault tolerant mechanisms have to be considered. For fault tolerance of the servo manipulator system, hardware and software redundancy has been considered. In the case of hardware, radioactive resistant electric components such as cables and connectors have been adopted and motors driving a transport have been duplicated. In case of software, a reconfiguration algorithm accommodating one motor's failure has been developed. The algorithm uses redundant axes to recover the end effector's motion in spite of one motor's failure.

• Journal of IKEEE
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• v.23 no.3
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• pp.925-933
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• 2019

In this paper, we implement ZYNQ SoC-based post-processing system that utilizes partial reconfiguration to remove blocking artifacts generated by compression algorithm. Hardware implementation of the deblocking filter in a Field Programmable Gate Array (FPGA) provides high computational capability and can be partially reconfigured to process 1080p images in real time. Partially reconfigurable areas in FPGA can be utilized to use hardware more efficiently in highly resource-constrained embedded systems. Experimental results of the proposed system show improvement of visual quality both objectively and subjectively with 0.6dB higher PSNR after deblocking filtering process. The measured power consumption of the deblocking filter during run-time is 68.33mW.