• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.20 no.2
• /
• pp.3-14
• /
• 2010

In this paper, we present the preimage attacks on step-reduced ARIRANG, HAS-160, and PKC98-Hash. We applied Aoki and Sasaki's chunk serach method which they have used in the attack on SHA-0 and SHA-1. Our attacks find the preimages of 35-step ARIRANG, 65-step HAS-160, and 80-step PKC98-Hash. Our results are the best preimage attacks for ARIRANG and HAS-160, and the first preimage attack for PKC98-Hash faster than exhaustive search.

• Journal of the Korea Society of Computer and Information
• /
• v.27 no.7
• /
• pp.17-25
• /
• 2022

Hash functions are widely used for fast equality analysis of video files because of their fixed small output sizes regardless of their input sizes. However, the hash function has the possibility of a hash collision in which different inputs derive the same output value, so there is a problem that different video files may be mistaken for the same file. In this paper, we propose an equality analysis scheme in which different video files always derive different output values using identifier information and double hash. The scheme first extracts the identifier information of an original video file, and attaches it into the end of the original file with a steganography method. Next the scheme calculates two hash output values of the original file and the extended file with attached identifier information. Finally the scheme utilizes the identifier information, the hash output value of the original file, and the hash output value of the extended file for the equality analysis of video files. For evaluation, we implement the proposed scheme into a practical software tool and show that the proposed scheme performs well the equality analysis of video files without hash collision problem and increases the resistance against the malicious hash collision attack.

• Journal of Information Processing Systems
• /
• v.12 no.2
• /
• pp.310-321
• /
• 2016

TCS_SHA-3 is a family of four cryptographic hash functions that are covered by a United States patent (US 2009/0262925). The digest sizes are 224, 256, 384 and 512 bits. The hash functions use bijective functions in place of the standard compression functions. In this paper we describe first and second preimage attacks on the full hash functions. The second preimage attack requires negligible time and the first preimage attack requires $O(2^{36})$ time. In addition to these attacks, we also present a negligible time second preimage attack on a strengthened variant of the TCS_SHA-3. All the attacks have negligible memory requirements. To the best of our knowledge, there is no prior cryptanalysis of any member of the TCS_SHA-3 family in the literature.

• Proceedings of the IEEK Conference
• /
• 2002.07b
• /
• pp.951-954
• /
• 2002

This paper presents the implementation of hash functions for IPSEC chip. There is an increasing interest in high-speed cryptographic accelerators for IPSec applications such as VPNs (virtual private networks). Because diverse algorithms are used in Internet, various hash algorithms are required for IPSec chip. Therefore, we implemented SHA-1, HAS-160 and MD5 in one chip. These hash algorithms are designed to reduce the number of gates. SHA-1 module is combined with HAS-160 module. As the result, the required logic elements are reduced by 27%. These hash algorithms have been implemented using Altera's EP20K1000EBC652-3 with PCI bus interface.

• The KIPS Transactions:PartD
• /
• v.12D no.3 s.99
• /
• pp.499-506
• /
• 2005

A hash chain is a structure organized by hash function with high speed in computation. Systems using the hash chain are using extensively in various cryptography applications such as one-time passwords, server-supported signatures and micropayments. However, the most hash chain based on the system using pre-paid method provides anonymity but has the problem to increase payment cost. In this paper, we propose a new hash chain based on the micropayment system to keep user anonymity safe through blind signature in the withdrawal process of the root value without disclosing privacy information, and to improve efficiency by using secret key instead of public key in the system without the role of certificate.

• Journal of IKEEE
• /
• v.22 no.1
• /
• pp.38-45
• /
• 2018

An integrated cryptographic processor that efficiently integrates ARIA, AES block ciphers and Whirlpool hash function into a single hardware architecture is described. Based on the algorithm characteristics of ARIA, AES, and Whirlpool, we optimized the design so that the hardware resources of the substitution layer and the diffusion layer were shared. The round block was designed to operate in a time-division manner for the round transformation and the round key expansion of the Whirlpool hash, resulting in a lightweight hardware implementation. The hardware operation of the integrated ARIA-AES-Whirlpool crypto-processor was verified by Virtex5 FPGA implementation, and it occupied 68,531 gate equivalents (GEs) with a 0.18um CMOS cell library. When operating at 80 MHz clock frequency, it was estimated that the throughputs of ARIA, AES block ciphers, and Whirlpool hash were 602~787 Mbps, 682~930 Mbps, and 512 Mbps, respectively.

• KSII Transactions on Internet and Information Systems (TIIS)
• /
• v.11 no.1
• /
• pp.536-551
• /
• 2017

With the advancement and deployment of leading-edge telecommunication technologies for sensing and collecting, computing related information, Cloud of Things (CoTs) has emerged as a typical application platform that is envisioned to revolutionize the daily activities of human society, such as intelligent transportation, modern logistics, food safety, environmental monitoring, etc. To avoid any possible malicious attack and resource abuse, employing hash functions is widely recognized as one of the most effective approaches for CoTs to achieve message integrity and data authentication. The Whirlpool hash function has served as part of the joint ISO/IEC 10118-3 International Standard by the International Organization for Standardization (ISO) and the International Electrotechnical Commission (IEC). In this paper, we propose an effective differential fault analysis on Whirlpool in the byte-oriented random fault model. The mathematical analysis and experimental results show that 8 random faults on average are required to obtain the current 512-bit message input of whirlpool and the secret key of HMAC-Whirlpool. Our work demonstrates that Whirlpool and HMAC-Whirlpool are both vulnerable to the single byte differential fault analysis. It provides a new reference for the security analysis of the same structure of the hash functions in the CoTs.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.37 no.2C
• /
• pp.132-139
• /
• 2012

In 2011, Woosik Bae proposed a NLMAP(New Low-cost Mutual Authentication Protocol) in RFID based on hash function. They argued that minimize computation such as random number generation. In addition, NLMAP is safe against replay attack, spoofing attack, traffic analysis and eavesdropping attack due to using mutual authentication. So, when applied to RFID system has advantage such as providing a high level of security at a lower manufacturing cost. However, unlike their argue, attacker can obtain Tag's hash computed unique identification information. This paper proves possible the location tracking and spoofing attack using H(IDt) by attacker. In addition, we propose the improved a mutual authentication protocol in RFID based on hash function and CRC code. Also, our protocol is secure against various attacks and suitable for efficient RFID systems better than NLMAP.

• Journal of information and communication convergence engineering
• /
• v.5 no.3
• /
• pp.254-258
• /
• 2007

Recently, ubiquitous computing in being actively researched and one of the main technology in ubiquitous computing environments is recognized as RFID system. The RFID system has much benefits but simultaneously has some problems such as user's privacy violation. In this paper, in order to improve the survivability of its nodes, it should build available simulation surrounding sensor nodes. Also, In the proposed cryptosystems we use a new hash function for user authentication and a stream cipher based on LFSR(Linear Feedback Shift Register) for message encryption and decryption. Moreover, each algorithm is programmed with C language and simulated on IBM-PC system and we analyze the randomness properties of the proposed algorithms by using statistical tests.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2017.05a
• /
• pp.194-196
• /
• 2017

본 설계에서는 임의의 길이의 메시지를 256-비트의 해시 코드로 압축하는 해시 알고리듬인 SHA-256(Secure Hash Algorithm-256) 해시함수를 경량화 구현 설계 하였다. 미국 표준 기술연구소 NIST에서 발표한 표준문서 FIPS 180-4에 정의16된 32-비트의 데이터 패스를 16-비트로 설계하여 경량화 구현하였다. Verilog HDL로 설계된 SHA-256 해시함수는 Xilinx ISim를 사용하여 시뮬레이션 검증을 하였다. CMOS 표준 셀 라이브러리로 합성한 결과 100MHz 동작주파수에서 18,192 GE로 구현되었으며, 192MHz의 최대 동작주파수를 갖는다.