• 대한전자공학회논문지TE
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• 제42권3호
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• pp.45-50
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• 2005

산업용, 의학용 및 군사용, 환경감시용 등 다양한 분야에서 UV 카메라가 이용되고 있다. 높은 분해능과 고효율을 가진 GaN 계열의 III-V족 질화물 반도체를 이용하여 제작한 UV 센서인 포토다이오드로 부터 최적의 자외선 응답을 읽어낼 수 있는 ROIC(ReadOut IC)를 개발 했다. FPA(Focal Plane Array)용 UV $8{\times}8$ ReadOut IC(ROIC)를 설계를 위하여 포토다이오드 타입 센서 소자를 커패시터로 모델링하였다. ROIC는 검출되는 신호를 받아 이를 증폭하고 잡음제거 필터링을 거쳐 픽셀 단위로 순차적으로 출력하는 기능을 수행하도록 하였다. ROIC는 $0.5{\mu}m$ 2Poly, 3Metal N-well CMOS process를 이용하여 제작되었으며, 이방성 전도성 페이스트 (Anisotropic Conductive Paste:ACP)를 사용하는 gold stud bumping 공정으로 ROIC와 포토다이오드 어레이를 하이브리드 패키지 (package)한 후 PC에서 자외선 영상으로 확인함으로써 ROIC의 동작을 검증하였다.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2000년도 Proceedings of 5th International Joint Symposium on Microeletronics and Packaging
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• pp.57-64
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology fur their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electrodes nickel, solder jetting, stud bumping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.

• 마이크로전자및패키징학회지
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• 제7권1호
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• pp.51-59
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• 2000

As integrated circuits become more complex, the number of I/O connections per chip grow. Conventional wire-bonding, lead-frame mounting techniques are unable to keep up. The space saved by shrinking die size is lost when the die is packaged in a huge device with hundreds of leads. The solution is bumps; gold, conductive adhesive, but most importantly solder bumps. Virtually every semiconductor manufacturer in the world is using or planning to use bump technology for their larger and more complex devices. Several wafer-bumping processes used in the manufacture of bumped wafer. Some of the more popular techniques are evaporative, stencil or screen printing, electroplating, electroless nickel, solder jetting, stud humping, decal transfer, punch and die, solder injection or extrusion, tacky dot process and ball placement. This paper will discuss the process steps for bumping wafers using these techniques. Critical cleaning is a requirement for each of these processes. Key contaminants that require removal are photoresist and flux residue. Removal of these contaminants requires wet processes, which will not attack, wafer metallization or passivation. Research has focused on enhanced cleaning solutions that meet this critical cleaning requirement. Process parameters defining time, temperature, solvency and impingement energy required to solvate and remove residues from bumped wafers will be presented herein.