• Title/Summary/Keyword: Glitch Attack

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An Experimental Fault Injection Attack on RSA Cryptosystem using Abnormal Source Voltage (비정상 전원 전압을 이용한 RSA 암호 시스템의 실험적 오류 주입 공격)

  • Park, Jea-Hoon;Moon, Sang-Jae;Ha, Jae-Cheol
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.19 no.5
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    • pp.195-200
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    • 2009
  • CRT-based RSA algorithm, which was implemented on smartcard, microcontroller and so on, leakages secret primes p and q by fault attacks using laser injection, EM radiation, ion beam injection, voltage glitch injection and so on. Among the many fault injection methods, voltage glitch can be injected to target device without any modification, so more practical. In this paper, we made an experiment on the fault injection attack using abnormal source voltage. As a result, CRT-RSA's secret prime p and q are disclosed by fault attack with voltage glitch injection which was introduced by several previous papers, and also succeed the fault attack with source voltage blocking for proper period.

Second-Order G-equivariant Logic Gate for AND Gate and its Application to Secure AES Implementation (AND 게이트에 대한 2차 G-equivariant 로직 게이트 및 AES 구현에의 응용)

  • Baek, Yoo-Jin;Choi, Doo-Ho
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.24 no.1
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    • pp.221-227
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    • 2014
  • When implementing cryptographic algorithms in mobile devices like smart cards, the security against side-channel attacks should be considered. Side-channel attacks try to find critical information from the side-channel infromation obtained from the underlying cryptographic devices' execution. Especially, the power analysis attack uses the power consumption profile of the devices as the side-channel information. This paper proposes a new gate-level countermeasure against the power analysis attack and the glitch attack and suggests how to apply the measure to securely implement AES.