• 한국전기전자재료학회논문지
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• 제37권5호
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• pp.507-511
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• 2024

Various process modifications have been used to minimize SiO₂ gate oxide aging in metal-oxide-semiconductor field-effect transistors (MOSFETs). In particular, post-metallization annealing (PMA) with a deuterium ambient can effectively eliminate both bulk traps and interface traps in the gate oxide. However, even with the use of PMA, it remains difficult to prevent high levels of radiation-induced gate oxide damage such as total ionizing dose (TID) during long-term missions. In this context, additional low-temperature heat treatment (LTHT) is proposed to recover from radiation-induced damage. Positive traps in the damaged gate oxide can be neutralized using LTHT, thereby prolonging device reliability in harsh radioactive environments.

• 한국전기전자재료학회논문지
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• 제35권3호
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• pp.264-268
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• 2022

High pressure deuterium (HPD) annealing is an advancing technology for the fabrication of modern semiconductor devices. In this work, gate-enclosed FETs are fabricated on a silicon substrate as test vehicles. After a cycle for the HPD annealing, the device parameters such as threshold voltage (V_TH), subthreshold swing (SS), on-state current (I_ON), off-state current (I_OFF), and gate leakage (I_G) were measured and compared depending on the HPD. The HPD annealing can passivate the dangling bonds at Si-SiO₂ interfaces as well as eliminate the bulk trap in SiO₂. It can be concluded that adding the HPD annealing as a fabrication process is very effective in improving device reliability, performance, and variability.