• Journal of Hydrogen and New Energy
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• v.26 no.2
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• pp.184-191
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• 2015

As the power electronics system increases the frequency, the power loss and thermal management are paid more attention. This research presents a real time model of dissipation power with junction temperature response for 120kw IGBT inverter which is applied to the thermal management of high power IGBT inverter. Since the computational time is critical for real time simulation, look-up tables of IGBT module characteristic curve are implemented. The power loss from IGBT provides a clue to calculate the temperature of each module of IGBT. In this study, temperature of each layer in IGBT is predicted by lumped capacitance analysis of layers with convective heat transfer. The power loss and temperature of layers in IGBT is then communicated due to mutual dependence. In the dynamic model, PWM pulses are employed to calculation real time IGBT and diode power loss. Under Matlab/Simulink$^{(R)}$ environment, the dynamic model is validated with experiment. Results showed that the dynamic response of power loss is closely coupled with effective thermal management. The convective heat transfer is enough to achieve proper thermal management under guideline temperature.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.310-313
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• 2002

Structures obtained with a direct boning of two FZ silicon wafers joined in such a way that a smooth surface of one wafer was attached to the grooved surface of the other were studied. A square net of grooves was made with a conventional photo lithography process. After high temperature annealing the appearance of voids and the rearrangement of structural defects were observed with X-ray diffraction topography techniques. It was shown that the formation of void free grooved boundaries was feasible. In the cases when particulate contamination was prevented, the voids appeared in the grooved structures could be eliminated with annealing. Since it was found that the flattening was accompanied with plastic deformation, this deformation was suggested to be intensively involved in the process of void removal. A model was proposed explaining the interaction between the structural defects resulted in "a dissolution" of cavities. The described processes may occur in grooved as well as in smooth structures, but there are the former that allow to manage air traps and undesirable excess of dislocation density. Grooves can be paths for air leave. According to the established mechanisms, if not outdone, the dislocations form local defect arrangements at the grooves permitting the substantial reduction in defect density over the remainder of the interfacial area.

• Journal of Information Display
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• v.10 no.4
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• pp.137-142
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• 2009

Transparent top-gate Al-Zn-Sn-O (AZTO) thin-film transistors (TFTs) with an $Al_2O_3$ protective layer (PL) on an active layer were studied, and a transparent 2.5-inch QCIF+AMOLED (active-matrix organic light-emitting diode) display panel was fabricated using an AZTO TFT backplane. The AZTO active layers were deposited via RF magnetron sputtering at room temperature, and the PL was deposited via two different atomic-layer deposition (ALD) processes. The mobility and subthreshold slope were superior in the TFTs annealed in vacuum and with oxygen plasma PLs compared to the TFTs annealed in $O_2$ and with water vapor PLs, but the bias stability of the TFTs annealed in $O_2$ and with water vapor PLs was excellent.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2006.05a
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• pp.595-596
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• 2006

The flexible organic thin film transistor (OTFT) array to use as a switching device for an organic light emitting diode (OLED) was designed and fabricated in the microcontact printing and low-temperature processes. The gate, source, and drain electrode patterns of OTFT were fabricated by microcontact printing which is high-resolution lithography technology using polydimethylsiloxane(PDMS) stamp. The OTFT array with dielectric layer and organic active semiconductor layers formed at room temperature or at a temperature tower than $40^{\circ}C$. The microcontact printing process using SAM(self-assembled monolayer) and PDMS stamp made it possible to fabricate OTFT arrays with channel lengths down to even nano size, and reduced the procedure by 10 steps compared with photolithography. Since the process was done in low temperature, there was no pattern transformation and bending problem appeared. It was possible to increase close packing of molecules by SAM, to improve electric field mobility, to decrease contact resistance, and to reduce threshold voltage by using a big dielecric.

• Journal of Information Display
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• v.5 no.4
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• pp.18-22
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• 2004

A carbon nanotube field emission display (CNT FED) panel with a 2 inch diagonal size was fabricated through screen printing of a prepared photo-sensitive CNT paste and vacuum in-line sealing technology. After surface treatment of the patterned CNT, only the carbon nanotube tips are uniformly exposed on the surface. The diameter of the exposed CNTs are usually about 20nm. The sealing temperature of the panel is around 390 $^{\circ}C$ and the vacuum level is obtained with $1.4{\times}10^{-5}$torr at the sealing. The field emission properties of the diode type CNT FED panel are characterized. Currently, we are in the process of developing a triode type CNT FED with a self-aligned gate-emitter structure.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.155-158
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• 2007

Printed organic thin-film transistor(OTFT) to use as a switching device for an organic light emitting diode(OLED) were fabricated in the microcontact printing and direct printing processes at room temperature. The gate electrodes($5{\mu}m$, $10{\mu}m$, and $20{\mu}m$) of OTFT was fabricated using microcontact printing process, and source/drain electrodes ($W/L=500{\mu}m/5{\mu}m$, $500{\mu}m/10{\mu}m$, and $500{\mu}m/20{\mu}m$) was fabricated using direct printing process with hard poly(dimethylsiloxane)(h-PDMS) stamp. Printed OTFT with dielectric layer was formed using special coating system and organic semiconductor layer was ink-jet printing process. Microcontact printing and direct printing processes using h-PDMS stamp made it possible to fabricate printed OTFT with channel lengths down to $5{\mu}m$, and reduced the process by 20 steps compared with photolithography. As results of measuring he transfer characteristics and output characteristics of OTFT fabricated with the printing process, the field effect characteristic was verified.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2002.11a
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• pp.85-90
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• 2002

$RuO_2$/GaN and related contacts were investigated for Schottky contacts in GaN-Based optical and electronic devices. We demonstrated that an $RuO_2$ film forms a stable Schottky contact on a GaN layer with a barrier height (${\Phi}_B$) of 1.46 eV and transmittance of 70% in the visible and near UV region. $RuO_2$/GaN Schottky diode showed a breakdown at over -50V and leakage current of only 0.3 nA at -5V. The $RuO_2$/GaN Schottky type photodetector had the UV/Visible rejection ratio of over $10^5$ and the responsivity of 0.23 A/W at 330 nm. The $RuO_2$ gate AlGaN/GaN EFET exhibited high drain current ($I_d$) of 689.3 mA/mm and high transconductance ($g_m$) of 197.4 mS/mm. Cut-Off frequency ($f_t$) and maximum operating frequency ($f_{max}$) were measured as 27.0 GHz and 45.5 GHz, respectively.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.4
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• pp.288-295
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• 2010

Multi-level inverters have drawn much of attention in recent years because it can meet the demand of high power applications and good power quality associated with reduced harmonic distortion. As the number of voltage level increases, field programmable gate arrays (FPGAs) are suitable for the implementation of multi-level modulation algorithm. This paper proposes the implementation method for generating PWM pulses at the three phase diode clamped five-level inverter using FPGA. The strategy for communicating stably the data of three-phase reference voltages between the DSP and FPGA is suggested. The techniques for generating PWM signals based on a multi-carrier modulation method are carried out through the experiments with 32-bit DSP and Cyclone-III FPGA.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2006.05a
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• pp.31-34
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• 2006

The characteristic of carbon nano fiber (CNF) as electron emitters was described. Carbon nano fiber (CNF) of herringbone was prepared by thermal chemical vapor deposition(CVD), mixed with binders and conductive materials, and then were formed by screen-printing process. In order to increase effectively field emissions, the surface treatment of rubbing & peel-off was applied to the printed CNF emitters on cathode electrode. The measurements of field emission properties were carried out by using a diode structure inline vacuum chamber. CNF of herringbone type showed good emission properties that a turn on field was as low as $2.5V/{\mu}m$ and current density was as large as $0.15mA/cm^2$ of $4.5V/{\mu}m$ with electric field. After the vacuum packaged panel of 5-inch in diagonal, the measured white brightness was as high as $7000cd/m^2$ at 1900V of anode and 700V of gate voltage.

• Proceedings of the KIEE Conference
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• 2001.10a
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• pp.180-182
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• 2001

Input Current Correction of Single-Phase Buck Rectifier is studied in the paper. To sinusoidal waveform the input current with a near-unity power factor over a wide variety of operating conditions, the output capacitor is operated with voltage reversibility for the supply by arranging the auxiliary diode and power switching device. Then the output voltage is superposed on the input voltage during on time duration of power switching devices in order to minimize the input current distortion caused by the small input voltage when changing the polarity. The tested setup, using two insulated-gate bipolar transistors(IGBT) and a microcomputer, is implemented and IGBT are switched with 20[kHz], which is out of the audible band. Moreover, a rigorous state-space analysis is introduced to predict the operation of the rectifier. The simulated results confirm that the input current can be sinusoidal waveform with a near-unity power factor and a satisfactory output voltage regulation can be achieved.