• The Journal of Korean Institute of Communications and Information Sciences
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• v.38B no.9
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• pp.744-750
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• 2013

In this paper, we proposed new type of an artificial magnetic conductor(AMC) structure, which has a high impedance surface for realizing the meta-material characteristics. The designed AMC structure set a goal of 3.2GHz, and the reflector, which consists of periodically arrayed AMCs is fabricated and measured. The high impedance improves the reflection coefficient, decreases the system size and interference, and increases the antenna performance. The structure has embodied the high impedance by the thickness and relative permitivity of the dielectric substrate and the design configuration without the metallic via hole which connects the AMC to the GND. The bandwidth is 150% broader than the similar AMC structures. Also, the distance between the antenna and the AMC reflector is decreased by ${\lambda}/10$ as working as the metal(PEC) reflectors. The antenna radiation characteristics are 3dB increased at 10mm away from reflector by measurement. The proposed reflector could be inserted in the portable mobile devices, and the antenna's performance has improved by the reflector. The specific absorption rate is dramatically decreased over 94% because the back radiation of the antenna is shielded.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.12 no.3
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• pp.312-320
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• 2019

In this paper, we design a 512Kb eFlash IP using 110nm eFlash cells. We proposed eFlash core circuit such as row driver circuit (CG/SL driver circuit), write BL driver circuit (write BL switch circuit and PBL switch select circuit), read BL switch circuit, and read BL S/A circuit which satisfy eFlash cell program, erase and read operation. In addition, instead of using a cross-coupled NMOS transistor as a conventional unit charge pump circuit, we propose a circuit boosting the gate of the 12V NMOS precharging transistor whose body is GND, so that the precharging node of the VPP unit charge pump is normally precharged to the voltage of VIN and thus the pumping current is increased in the VPP (boosted voltage) voltage generator circuit supplying the VPP voltage of 9.5V in the program mode and that of 11.5V in the erase mode. A 12V native NMOS pumping capacitor with a bigger pumping current and a smaller layout area than a PMOS pumping capacitor was used as the pumping capacitor. On the other hand, the layout area of the 512Kb eFlash memory IP designed based on the 110nm eFlash process is $933.22{\mu}m{\times}925{\mu}m(=0.8632mm^2)$.