• 한국정보과학회논문지:컴퓨팅의 실제 및 레터
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• 제12권2호
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• pp.141-148
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• 2006

본 논문에서는 정형 검증 도구를 이용한 보안 소프트웨어의 보안성을 검증하고 검증된 결과를 이용하여 안전한 보안 소프트웨어 개발 방안을 살펴본다. 정형 검증 기법에 따라 사용되어질 수 있는 각 정형 검증 도구들을 살펴보고 그 특성을 파악하여 보안 소프트웨어의 안정성과 신뢰성을 보장하는 적합한 도구들을 알아보고, 보안 소프트웨어 개발 방안을 제시한다. Z 언어를 이용하는 도구인 Z/EVES는 Z명세에 대한 분석 방법을 제시함으로써 보안 소프트웨어에서 가장 많이 사용되는 대표적인 정형 검증 도구이다. 본 논문에서는 보안 소프트웨어 검증을 위하여 C 언어로 작성된 보안 소프트웨어를 Z명세 언어로 변환하고 이것을 Z/EVES도구를 이용한다.

• 정보처리학회논문지D
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• 제11D권4호
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• pp.855-864
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• 2004

정형적 명세를 이용하면 원시코드의 복잡함에 방해받지 않고 필요한 구현 정보를 테스트 프로그래머가 얻을 수 있다. 특히 웹 기반 소프트웨어는 정형적 명세로 시스템에 대한 외부 입력과 반응을 잘 나타낼 수가 있다. 이 논문에서는 정형적 명세를 이용하여 테스트 데이터를 추출하는 방법을 제안한다. 복잡하고 구성요소가 다양한 웹 어플리케이션의 기능을 Object-Z 정형 명세언어를 이용하여 핵심적으로 나타낸다. 정형 명세에서부터 상태모델을 구성하고 최상위 레벨의 STD에서 세부적으로 STD를 추가하여 테스트 시나리오를 추출하였다. 실험 대상은 보안과 정확성을 요하는 웹 뱅킹 시스템으로 정하고 계좌이체 과정의 테스트 데이터를 추출하였다. 제안한 방법은 사용기반 테스트 기법과 결합하여 웹 소프트웨어의 테스트 자동화에 중요한 요소가 될 것이다.

• 대한가정학회지
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• 제43권4호
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• pp.97-110
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• 2005

The need for children's formal wear is growing as parents take their children into formal occasions more often than before. Yet there are some problems to be solved in order to generalize about children's formal wear such as high price and the development of patterns for better fit and design. Mothers of boys were surveyed to find out the needs, complaints, and required improvements of boy's formal wear. Pattern designers of children's formal wear brands were interviewed to determine the size specifications, pattern drafting methods and design features of each brand. Based on these results, several pattern drafting methods were selected. Jackets and pants for 9-year-olds were made by each pattern drafting method using the us standard size. They were compared through wearing test to improve the fit. As a result, pattern drafting methods for children's tailored suits and two formal jackets were suggested.

• 한국원자력학회:학술대회논문집
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• 한국원자력학회 1997년도 춘계학술발표회논문집(1)
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• pp.153-158
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• 1997

This paper describes a formal safety analysis technique which is demonstrated by performing empirical formal safety analysis with the case study of beamline hutch door Interlock system that is developed by using PLC(Programmable Logic Controller) systems at the Pohang Accelerator Laboratory. In order to perform formal safety analysis, we have built the Z formal specifications representation from user requirement written in ambiguous natural language and target PLC ladder logic, respectively. We have also studied the effective method to express typical PLC timer component by using specific Z formal notation which is supported by temporal history. We present a formal proof technique specifying and verifying that the hazardous states are not introduced into ladder logic in the PLC-based safety critical system.

• 한국경영과학회지
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• 제17권3호
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• pp.79-99
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• 1992

The DEVS (Discrete Event system Specification) formal model for discrete event simulation is a hierarchical, modular model. Because the DEVS formal model has a mathematical structure, it provides a theoretic background of discrete event simulation model. However, the DEVS formal model is difficult to understand because of its mathematical structure. Also, since the DEVS formal model is often constructed by heuristic, subjective method of model designer from the model, a systematic model built-in methodology does not exist. In this paper, we propose the model formalization methodology from an informal model to the DEVS formal model. For this formalization methodology, we introduce formal tools for model construction based on the DEVS ( from an informal model : Event Dependency Graph (EDG) for the event analysis and State Representation Graph(SRG) for the system state analysis.

• 호남수학학술지
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• 제30권4호
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• pp.631-635
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• 2008

In this paper we discuss on the formal linearization and exact solution of Klein-Gordon's equation (1) $u_{tt}-au_{xx}+bu-cu^3=0 a,b,c{\in}R^+$ So that we know an efficient method for constructing of particular solutions of some nonlinear partial differential equations is introduced.

• 한국정보과학회논문지:소프트웨어및응용
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• 제27권2호
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• pp.120-133
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• 2000

산업현장에서 복합 실시간 계통(HRTS: Hybrid Real-Time Systems) 개발을 위한 정형기법 사용의 주된 장벽은 인지적 어려움이며 이는 또 다른 위험을 초래할 수 있다. 이러한 문제를 극복하기 위해 HRTS 요구분석과 안전성 분석 시 사용자의 인지적 부담을 줄여줄 수 있는 정성적 요구분석 체계를 제안한다. 이 체계는 요구사항 명세를 위한 정성적 정형기법(QFM: Qualitative Formal Method)과 인과정보에 의한 요구사항 안전성 분석기법(CRSA: Causal Requirements Safety Analysis)으로 구성되어 있다. QFM에서는 인공지능 분야에서 연구된 정성추론 이론을 정형명세에 도입하여 요구사항 설계자와 분석자의 인지적 부담을 줄일 수 있도록 하였다. CRSA는 QFM에서 도출한 HRTS 동작의 인과 정보에 따라 체계적으로 위험 원인을 추적할 수 있도록 하여, 기존 결함 트리 분석(FTA: Fault Tree Analysis) 기법의 단점인 분석자의 주관에 의존하는 문제를 해결한다. 월성 원자력 발전소 자동정지계통(Shutdown System 2) 소프트웨어 요구사항 명세와 안전성 분석에 QFM과 CRSA를 적용하여 그 실효성을 입증하고자 하였다.

• 한국경영과학회:학술대회논문집
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• 한국경영과학회 2003년도 추계학술대회 및 정기총회
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• pp.297-300
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• 2003

This paper considers formal verification methods for enhancing software reliability. The formal method verifies that a software is correctly implemented according to its specification by using a mathematical formalism. This paper presents a partial survey on the formal methods and discusses possible applications for the improved software implementation. Finally, some topics are remarked as further studies.

• 대한안전경영과학회지
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• 제17권1호
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• pp.179-192
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• 2015

In an automated industry PLC plays a central role to control the automation system. Therefore, fault free operation of PLC controlled automation system is essential in order to maximize a firm's productivity. A prior test of control system is a practical way to check fault operations, but it is a time consuming job and can not check all possible fault operation. A formal verification of PLC program could be a best way to check all possible fault situation. Tracing the history of the study on formal verification, we found three problems, the first is that a formal representation of PLC control system is incomplete, the second is a state explosion problem and the third is that the verification result is difficult to use for the correction of control program. In this paper, we propose a transformation method to reproduce the control system correctly in formal model and efficient procedure to verify and correct the control program using verification result. To demonstrate the proposed method, we provided a suitable case study of an automation system.

• 한국철도학회논문집
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• 제7권2호
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• pp.114-119
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• 2004

According to the computerization of railway signalling systems. the communication protocol for interface between these systems are required. Therefore the new communication protocol for railway signaling system is required. Generally, there are two verification method for new designed protocol in the industrial and academic fields. One is the laboratory testing method which is very popular and general technique. In our research the comparison between existing and new designed protocol for signaling is described and the verification test results are also represented. From these laboratory test, we are verified the conformance of new designed protocol. Another method is verified by formal method. The format verification method is widely used at safety-critical system design but this approach is nor popular at verification communication protocol. However it is very important to verify the safety of new designed protocol for railway signaling system because signaling systems are very safety-critical systems. So, the methodology for formal verification of designed protocol is also reviews in this paper.