• Title/Summary/Keyword: Focal plane Electronics

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Removing Chromatic Aberration in Color Image by Gradient Difference Minimization (기울기 차이 최소화를 통한 컬러 영상의 색수차 제거)

  • Kwon, Ji Yong;Kang, Moon Gi
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.2
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    • pp.85-91
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    • 2017
  • Lenses have different refractive indices for different wavelengths of light. This is why different wavelengths of rays are focused at different positions in the focal plane. Images are blurred and noticeable colored edges appear around the objects, which is known as chromatic aberration (CA). In this paper, an algorithm for removing CA artifacts in color images is proposed. Based on the fact that the gradients of color channels are highly correlated, the differences of the gradients of the channels in edges are minimized. The cost function is designed by using the gradients of the channels. Experimental results show the good performance of the proposed algorithm in removing the CA artifacts.

A $64\times64$ IRFPA CMOS Readout IC for Uncooled Thermal Imaging (비냉각 열상장비용 $64\times64$ IRFPA CMOS Readout IC)

  • 우회구;신경욱;송성해;박재우;윤동한;이상돈;윤태준;강대석;한석룡
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.5
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    • pp.27-37
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    • 1999
  • A CMOS ReadOut Integrated Circuit (ROlC) for InfraRed Focal Plane Array (IRFPA) detector is presented, which is a key component in uncooled thermal imaging systems. The ROIC reads out signals from $64\times64$ Barium Strontium Titanate (BST) infrared detector array, then outputs pixel signals sequentially after amplifying and noise filtering. Various design requirements and constraints have been considered including impedance matching, low noise, low power dissipation and small detector pitch. For impedance matching between detector and pre~amplifier, a new circuit based on MOS diode structure is devised, which can be easily implemented using standard CMOS process. Also, tunable low pass filter with single~pole is used to suppress high frequency noise. In additions, a clamping circuit is adopted to enhance the signal~to-noise ratio of the readout output signals. The $64\times64$ IRFPA ROIC is designed using $0.65-\mu\textrm{m}$ 2P3M (double poly, tripple metal) N~Well CMOS process. The core part of the chip contains 62,000 devices including transistors, capacitors and resistors on an area of about $6.3-mm\times6.7-mm$.

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Fixed Pattern Noise Reduction in Infrared Videos Based on Joint Correction of Gain and Offset (적외선 비디오에서 Gain과 Offset 결합 보정을 통한 고정패턴잡음 제거기법)

  • Kim, Seong-Min;Bae, Yoon-Sung;Jang, Jae-Ho;Ra, Jong-Beom
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.49 no.2
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    • pp.35-44
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    • 2012
  • Most recent infrared (IR) sensors have a focal-plane array (FPA) structure. Spatial non-uniformity of a FPA structure, however, introduces unwanted fixed pattern noise (FPN) to images. This non-uniformity correction (NUC) of a FPA can be categorized into target-based and scene-based approaches. In a target-based approach, FPN can be separated by using a uniform target such as a black body. Since the detector response randomly drifts along the time axis, however, several scene-based algorithms on the basis of a video sequence have been proposed. Among those algorithms, the state-of-the-art one based on Kalman filter uses one-directional warping for motion compensation and only compensates for offset non-uniformity of IR camera detectors. The system model using one-directional warping cannot correct the boundary region where a new scene is being introduced in the next video frame. Furthermore, offset-only correction approaches may not completely remove the FPN in images if it is considerably affected by gain non-uniformity. Therefore, for FPN reduction in IR videos, we propose a joint correction algorithm of gain and offset based on bi-directional warping. Experiment results using simulated and real IR videos show that the proposed scheme can provide better performance compared with the state-of-the art in FPN reduction.

Statistical Analysis of Focus Adjustment Method for a Floating Imaging System with Symmetric Error Factors (대칭형 공차를 갖는 플로팅 광학계의 상면 변화 보정 방법에 대한 통계적 해석)

  • Ryu, Jae Myung;Kim, Yong Su;Jo, Jae Heung;Kang, Geon Mo;Lee, Hae Jin;Lee, Hyuck Ki
    • Korean Journal of Optics and Photonics
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    • v.23 no.5
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    • pp.189-196
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    • 2012
  • A floating optical system is a system that moves more than 2 groups to focus at the camera lens. At the camera optics, the floating system that is mainly used is an optical system such as a macro lens which changes magnification very much. When the floating system is assembled and fabricated in the factory, there are differences between the image plane of the sensor and the focal plane of the infinity or macro state. Therefore, in a considerable proportion of cases, the focus adjustment to minimize the difference of BWD(Back Working Distance) is carried out in the process of manufacturing. In this paper, in order to decide the movement of each group in a floating system, we evaluated the rotation angle of CAM for the focus adjustment. We know that the maximum magnification of macro state is corrected by this numerical method for the focus adjustment, too. We investigated the limit of CAM rotation angle of the system by using statistical analysis for CAM rotation angle, which uses the focus adjustment of the floating system with symmetric error factors.

A Review of EOS Thermal Control Logic for MSC on KOMPSAT-2

  • Heo H.P.;Kong J.P.;Kim Y.S.;Park J.E.;Youn H.S.;Paik H.Y.
    • Proceedings of the KSRS Conference
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    • 2004.10a
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    • pp.452-455
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    • 2004
  • MSC (Multi-Spectral Camera) system is a remote sensing instrument to obtain high resolution ground image. EOS (Electro-Optic System) for MSC mainly consists of PMA (Primary Mirror Assembly), SMA (Secondary Mirror Assembly), HSTS (High Stability Telescope Structure) and DFPA (Detector Focal Plane Assembly). High performance of EOS makes it possible for MSC system to provide high resolution and high quality ground images. Temperature of the EOS needs to be controlled to be in a specific range in order not to have any thermal distortion which can cause performance degradation. It is controlled by full redundant CPU based electronics. The validity of thermistor readings can be checked because a few thermistors are installed on each control point on EOS. Various kinds of thermal control logics are used to prevent 'Single Point Failure'. Control logic has a few set of database in order not to be corrupted by SEU (Single Event Upset). Even though the thermal control logic is working automatically, it can also be monitored and controlled by ground-station operator. In this paper, various ways of thermal control logic for EOS in MSC will be presented, which include thermal control mode and logic, redundancy design and status monitoring and reporting scheme.

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Design and analysis of a signal readout integrated circuit for the bolometer type infrared detect sensors (볼로미터형 적외선 센서의 신호처리회로 설계 및 특성)

  • Kim, Jin-Su;Park, Min-Young;Noh, Ho-Seob;Lee, Seoung-Hoon;Lee, Je-Won;Moon, Sung-Wook;Song, Han-Jung
    • Journal of Sensor Science and Technology
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    • v.16 no.6
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    • pp.475-483
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    • 2007
  • This paper proposes a readout integrated circuit (ROIC) for $32{\times}32$ infrared focal plane array (IRFPA) detector, which consist of reference resistor, detector resistor, reset switch, integrated capacitor and operational amplifier. Proposed ROIC is designed using $0.35{\;}{\mu}m$ 2P-4M (double poly four metal) n-well CMOS process parameters. Low noise folded cascode operational amplifier which is a key element in the ROIC showed 12.8 MHz unity-gain bandwidth and open-gain 89 dB, phase margin $67^{\circ}$, SNR 82 dB. From proposed circuit, we gained output voltage variation ${\Delta}17{\};mV/^{\circ}C$ when the detector resistor varied according to the temperature.

Folded-Cascode Operational Amplifier for $32{\times}32$ IRFPA Readout Integrated Circuit using the $0.35{\mu}m$ CMOS process ($0.35{\mu}m$ CMOS 공정을 이용한 $32{\times}32$ IRFPA ROIC용 Folded-Cascode Op-Amp 설계)

  • Kim, So-Hee;Lee, Hyo-Yeon;Jung, Jin-Woo;Kim, Jin-Su;Kang, Myung-Hoon;Park, Yong-Soo;Song, Han-Jung;Jeon, Min-Hyun
    • Proceedings of the IEEK Conference
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    • 2007.07a
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    • pp.341-342
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    • 2007
  • The IRFPA (InfraRed Focal Plane Array) ROIC (ReadOut Integrated Circuit) was designed in folded-cascode Op-Amp using $0.35{\mu}m$ CMOS technology. As the folded-cascode has high open-loop voltage gain and fast settling time, that used in many analog circuit designs. In this paper, folded-cascode Op-Amp for ROIC of the $32{\times}32$ IRFPA has been designed. HSPICE simulation results are unit gain bandwidth of 13.0MHz, 90.6 dB open loop gain, 8 V/${\mu}m$ slew rate, 600 ns settling time and $66^{\circ}$ phase margin.

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Implementation of BSCT $320{\times}240$ IR-FPA for Uncooled Thermal Imaging System (비냉각 열 영상 시트템용 BSCT $320{\times}240$ IR-FPA의 구현)

  • Kang, Dae-Seok;Shin, Gyeong-Uk;Park, Jae-U;Yoon, Dong-Han;Song, Seong-Hae;Han, Myeong-Su
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.11
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    • pp.7-13
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    • 2002
  • BSCT 320${\times}$240 IRFPA detector module is implemented, which is a key component in uncooled thermal imaging systems. The detector module consists of two parts, infrared sensitive pixel array and read-out integrated circuit(ROIC). The BSCT 320${\times}$240 pixels are made by laser scribe process and 10-${\mu}m$ micro-bump to satisfy 50-${\mu}m$ pitch and 95-% fill-factor. The ROIC has been designed to electrically address the pixels sequentailly and to improve signal-to-noise ratio with single transistor amplifier, HPF, tunable LPF and clamp circuit. The fabricated hybrid chip of detector and ROIC has been mounted on the TEC built-in ceramic package for more stable operation and tested for lots of electrical and optical properties. The IRFA sample has shown successful properties and met with good results of fill-factor, detectivity and responsivity.

Pixel-level Current Mirroring Injection with 2-step Bias-current Suppression for 2-D Microbolometer FPAs (이차원 마이크로볼로미터 FPA를 위한 이 단계 바이어스 전류 억제 방식을 갖는 픽셀 단위의 전류 미러 신호취득 회로)

  • Hwang, Chi Ho;Woo, Doo Hyung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.52 no.11
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    • pp.36-43
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    • 2015
  • A pixel-level readout circuit is studied for 2-dimensional microbolometer focal plane arrays (FPAs). A current mirroring injection (CMI) input circuit with 2-step current-mode bias suppression is proposed for a pixel-level architecture with high responsivity and long integration time. The proposed circuit has been designed using a $0.35-{\mu}m$ 2-poly 4-metal CMOS process for a $320{\times}240$ microbolometer array with a pixel size of $50{\mu}m{\times}50{\mu}m$. The proposed 2-step bias-current suppression has sufficiently low calibration error with wide calibration range, and the calibration range and error can be easily optimized by controlling some design parameters. Due to high responsivity and a long integration time of more than 1 ms, the noise equivalent temperature difference (NETD) of the proposed circuit can be improved to 26 mK, which is much better than that of the conventional circuits, 67 mK.

A Study on the Near Field Beam Scanning of the Array Antenna (근거리 빔 스캐닝 안테나에 관한 연구)

  • Song, Woo-Young
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.10 no.3
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    • pp.220-224
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    • 2017
  • In this paper, a method of feeding for the near field beam scanning array antenna with three dimensional focal point has been studied. The conventional array antenna theory is mostly about the far field points. The basic idea is to feed the transmitted signal so that it is in phase at the desired point. In this study, a method is proposed to compensate the phase to have the maximum received power at the point where the measurement point distance is near to the array antenna size. In the proposed method, 11 point source antennas are arrayed in three ways in free space. And the contour map is plotted by calculating the radiation patterns in the three dimensional space and the received signal intensities in the plane within the near space. As a result, it was confirmed that 3 dimensional beam scanning is possible also in the near field of the array antenna.