• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.6
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• pp.1696-1704
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• 2008

The conventional hard disk has been the dominant database storage system for over 25 years. Recently, hybrid systems which incorporate the advantages of flash memory into the conventional hard disks are considered to be the next dominant storage systems. Their features are satisfying the requirements like enhanced data I/O, energy consumption and reduced boot time, and they are sufficient to hybrid storage systems as major database storages. However, we need to improve traditional index management schemes based on B-Tree due to the relatively slow characteristics of hard disk operations, as compared to flashmemory. In order to achieve this goal, we propose a new index management scheme called FNC-Tree. FNC-Tree-based index management enhanced search and update performance by caching data objects in unused free area of flash leaf nodes to reduce slow hard disk I/Os in index access processes. Based on the results of the performance evaluation, we conclude that our scheme outperforms the traditional index management schemes.

• Journal of the Korea Society of Computer and Information
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• v.22 no.5
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• pp.1-9
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• 2017

Recently, flash memory has been in a great demand from embedded system sectors for storage devices. However, program/erase (P/E) cycles per block are limited on flash memory. For the limited number of P/E cycles, many wear leveling techniques are studied. They prolonged the life time of flash memory using information tables. As one of the techniques, block erase table (BET) method using a bit array table was studied for embedded devices. However, it has a disadvantage in that performance of wear leveling is sharply low, when the consumption of memory is reduced. To solve this problem, we propose a novel wear leveling technique using Sampling-based Block Erase Table (SBET). SBET relates one bit of the bit array table to each block by using exclusive OR operation with round robin function. Accordingly, SBET enhances accuracy of cold block information and can prevent to decrease the performance of wear leveling. In our experiment, SBET prolongs life time of flash memory by up to 88%, compared with previous techniques which use a bit array table.

• Journal of KIISE:Computing Practices and Letters
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• v.13 no.5
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• pp.333-337
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• 2007

Flash Translation Layer(FTL) which enables NAND Flash memory-based storage system to be used as a block device is designed considering only characteristics of NAND Flash memory. However, since FTL precesses I/O requests which survived against buffer replacement algorithm, FTL algorithm has tight relationship with buffer replacement algorithm. Therefore, if we do not consider both FTL and buffer replacement algorithms, it is difficult to predict the actual I/O performance of the computer systems that have Flash memory-based storage system. The necessity of FTL and buffer replacement algorithm co-design arises here. In this work, we implemented I/O performance evaluation tool, IPSiNS, which simulates both the buffer replacement and FTL algorithms, simultaneously.

• Journal of Internet of Things and Convergence
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• v.10 no.3
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• pp.13-18
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• 2024

Recently, reliability has become more important as flash-based storage devices are actively used in cloud servers and data centers. Flash memory chips have limitations in reading/writing, so if writing is concentrated in one location, the chip can no longer be used. To solve this problem and improve reliability, it is necessary to equalize the wear of flash memory chips. However, in order to equalize the wear of flash memory with increasing capacity, the workload increases proportionally. In particular, when searching for a block with the maximum/minimum number of deletions for all blocks of a flash memory chip, the cost increases depending on the capacity of the storage device. In this paper, a random selection method of blocks was applied to solve the previous problem. When k is the randomly selected block, actual experimental results confirmed that searching all blocks with an k value of 4 or more yields similar results.

• Journal of KIISE:Computing Practices and Letters
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• v.15 no.1
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• pp.1-13
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• 2009

Flash memory is widely used as a storage medium of mobile devices such as MP3 players, cellular phones and digital cameras due to its tiny size, low power consumption and shock resistant characteristics. Currently, there are many studies to replace HDD with flash memory because of its numerous strong points. To use flash memory as a storage medium, FTL(Flash Translation Layer) is required since flash memory has erase-before-write constraints and sizes of read/write unit and erase unit are different from each other. Recently, new type of flash memory called "large block flash memory" is introduced. The large block flash memory has different physical structure and characteristics from previous flash memory. So existing FTLs are not efficiently operated on large block flash memory. In this paper, we propose an efficient FTL for large block flash memory based on FAST(Fully Associative Sector Translation) scheme and page-level mapping on data blocks.

• Journal of Information Technology Applications and Management
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• v.12 no.4
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• pp.59-70
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• 2005

Flash memories are one of best media to support portable computer's storages in mobile computing environment. The features of non-volatility, low power consumption, and fast access time for read operations are sufficient grounds to support flash memory as major database storage components of portable computers. However, we need to improve traditional transaction management scheme due to the relatively slow characteristics of flash operation as compared to RAM memory. in order to achieve this goal, we devise a new scheme called Flash Two Phase Locking (F2PL) scheme for efficient transaction processing. F2Pl improves transaction performance by allowing multi version reads and efficiently handling slow flash write/erase operation in lock management process. We also propose a simulation model to show the performance of F2PL. Based on the results of the performance evaluation, we conclude that F2PL scheme outperforms the traditional scheme.

• Proceedings of the IEEK Conference
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• 2003.11b
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• pp.15-18
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• 2003

Flash memory becomes more important for its fast access speed, low-power, shock resistance and nonvolatile storage. But its native restrictions that have limited 1ifetime, inability of update in place, different size unit of read/write and erase operations need to managed by FTL(Flash Translation Layer). FTL has to control the wear-leveling, address mapping, bad block management of flash memory. In this paper, we focuses on the fast access to address mapping table and proposed the way of faster valid page search in the flash memory using the VPLT(Valid Page Lookup Table). This method is expected to decrease the frequency of access of flash memory that have an significant effect on performance of read and block-transfer operations. For the validations, we implemented the FTL based on Windows CE platform and obtained an improved result.

• Journal of Information Technology Applications and Management
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• v.13 no.2
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• pp.115-126
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• 2006

Recently, flash memories are one of best media to support portable computer's storages in mobile computing environment. We propose a new transaction recovery scheme for a flash memory database environment which is based on a flash media file system. We improved traditional shadow paging schemes by reusing old data pages which are supposed to be invalidated in the course of writing a new data page in the flash file system environment. In order to reuse these data pages, we exploit deferred cleaning list structure in our flash memory shadow paging (FMSP) scheme. FMSP scheme removes the additional storage overhead for keeping shadow pages and minimizes the I/O performance degradation caused by data page distribution phenomena of traditional shadow paging schemes. We also propose a simulation model to show the performance of FMSP. Based on the results of the performance evaluation, we conclude that FMSP outperforms the traditional scheme.

• Journal of KIISE:Computer Systems and Theory
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• v.37 no.6
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• pp.330-338
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• 2010

Flash storage devices are very popularly used in portable devices such as cell phones, PDAs and MP3 players. As technology is improved, users want much bigger and faster storage system. Paradoxically, people have to wait more and more time proportionally to the capacity of their storage devices when these are trying to be recovered after file system crash. It is serious problem because booting time of devices is dominated by crash recovery of flash file system. In this paper, we design a crash recovery mechanism, named 'Working Area(WA hereafter)' technique, which has bounded crash recovery execution time. With WA technique, write operations to flash memory are only performed in WA. Therefore, by simply scanning the latest WA. We can recover a file system crash because every change for flash memory is occured only in latest WA. We implement the WA technique based on YAFFS2 and evaluate by comparing with traditional techniques. As a result, WA technique shows that its crash recovery execution time is 25 times faster than Log-based Method when we use 1 gig a bytes NAND flash memory in worst case. This gap will be futher and futher as storage capacity grows.

• Journal of the Korean Society of Safety
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• v.30 no.4
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• pp.86-91
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• 2015

The flash point is used to categorize inflammable liquids according to their relative flammability. Such a categorization is important for the safe handling, storage, and transportation of inflammable liquids. The flash point temperature of two binary liquid mixtures(n-octane+n-decane and n-octane+n-dodecane) has been measured for the entire concentration range using Seta-flash closed cup tester based on the ASTM D3278 method. The closed cup flash point temperature was estimated using the UNIFAC(Universal Functional Activity Coefficient) group contribution model. The experimentally derived flash point was also compared with the predicted flash point from the UNIFAC model. The UNIFAC model is able to estimate the flash point fairly well for n-octane+n-decane mixture and n-octane+n-dodecane mixture.