• Title/Summary/Keyword: Flash based storage

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Mounting Time Reduction and Clean Policy using Content-Based Block Management for NAND Flash File System (NAND 플래시 파일 시스템을 위한 내용기반 블록관리기법을 이용한 마운트 시간 감소와 지움 정책)

  • Cho, Wan-Hee;Lee, Dong-Hwan;Kim, Deok-Hwan
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.3
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    • pp.41-50
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    • 2009
  • The flash memory has many advantages such as low power consumption, strong shock resistance, fast I/O and non-volatility. And it is increasingly used in the mobile storage device. Many researchers are studying the YAFFS, NAND flash file system, which is widely used in the embedded device. However, the existing YAFFS has two problems. First, it takes long time to mount the YAFFS file system because it scans whole spare areas in all pages. Second, the cleaning policy of the YAFFS does not consider the wear-leveling so that it cannot guarantee the duration of data completely. In order to solve these problems, this paper proposes a new content-based YAFFS that consists of a mounting time reduction technique and a content-cleaning policy by using content-based block management. The proposed method only scans partial spare areas of some special pages and provides the block swapping which enables the wear-leveling of data blocks. We performed experiments to compare the performance of the proposed method with those of the JFFS2 system and YAFFS system. Experimental results show that the proposed method reduces the average mounting time by 82.2% comparing with JFFS2 and 42.9% comparing with YAFFS. Besides, it increases the life time of the flash memory by 35% comparing with the existing YAFFS whereas no overheat is added.

Design, Implementation, and Performance Evaluation of File System on a Chip (파일시스템을 내장한 저장장치의 설계, 구현 및 성능분석)

  • Ahn Seongiun;Choi Jongmoo;Lee Donghee;Noh Sam H.;Min Sang Lyul;Cho Yookun
    • Journal of KIISE:Computing Practices and Letters
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    • v.10 no.6
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    • pp.448-459
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    • 2004
  • Interoperability is an important requirement of portable storage devices that are used to exchange and share data among diverse hosts. However, the required interoperability cannot be provided if different host systems use different file systems. To address this problem, we propose a new type of storage device called FSOC(File System On a Chip) that contains the file system within the storage device. In this paper, we give an example of the design and implementation of a flash memory-based FSOC and propose the performance models of the conventional storage device and the FSOC. We also analyze the performance characteristics of the conventional storage device and the FSOC based on the proposed performance models, and provide several experimental results using real applications that validate the performance models.

Performance Evaluation of SSD Cache Based on DM-Cache (DM-Cache를 이용해 구현한 SSD 캐시의 성능 평가)

  • Lee, Jaemyoun;Kang, Kyungtae
    • KIPS Transactions on Computer and Communication Systems
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    • v.3 no.11
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    • pp.409-418
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    • 2014
  • The amount of data located in storage servers has dramatically increased with the growth in cloud and social networking services. Storage systems with very large capacities may suffer from poor reliability and long latency, problems which can be addressed by the use of a hybrid disk, in which mechanical and flash memory storage are combined. The Linux-based SSD(solid-state disk) uses a caching technique based on the DM-cache utility. We assess the limitations of DM-cache by evaluating its performance in diverse environments, and identify problems with the caching policy that it operates in response to various commands. This policy is effective in reducing latency when Linux is running in native mode; but when Linux is installed as a guest operating systems on a virtual machine, the overhead incurred by caching actually reduces performance.

Log-Structured B-Tree for NAND Flash Memory (NAND 플래시 메모리를 위한 로그 기반의 B-트리)

  • Kim, Bo-Kyeong;Joo, Young-Do;Lee, Dong-Ho
    • The KIPS Transactions:PartD
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    • v.15D no.6
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    • pp.755-766
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    • 2008
  • Recently, NAND flash memory is becoming into the spotlight as a next-generation storage device because of its small size, fast speed, low power consumption, and etc. compared to the hard disk. However, due to the distinct characteristics such as erase-before-write architecture, asymmetric operation speed and unit, disk-based systems and applications may result in severe performance degradation when directly implementing them on NAND flash memory. Especially when a B-tree is implemented on NAND flash memory, intensive overwrite operations may be caused by record inserting, deleting, and reorganizing. These may result in severe performance degradation. Although ${\mu}$-tree has been proposed in order to overcome this problem, it suffers from frequent node split and rapid increment of its height. In this paper, we propose Log-Structured B-Tree(LSB-Tree) where the corresponding log node to a leaf node is allocated for update operation and then the modified data in the log node is stored at only one write operation. LSB-tree reduces additional write operations by deferring the change of parent nodes. Also, it reduces the write operation by switching a log node to a new leaf node when inserting the data sequentially by the key order. Finally, we show that LSB-tree yields a better performance on NAND flash memory by comparing it to ${\mu}$-tree through various experiments.

An Analysis Method of Large Structure Using Matrix Blocking (블록화기법을 이용한 대형구조물의 해석방법)

  • Jung, Sung-Jin;Lee, Min-Sup
    • Journal of the Korea institute for structural maintenance and inspection
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    • v.18 no.2
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    • pp.30-37
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    • 2014
  • In this study, we studied how to perform the structural analysis which need a large-capacity flash memory with the computer program when the flash memory storage of a personal computer has no enough room for the analysis of structure. As one of the solutions of this problem, the blocking method of stiffness matrix, which is a method that stiffness matrix is divided by a few blocks and each block is sequentially used for the calculation of matrix decomposition, is proposed and an algorithm available in computer program is derived on the method. Finally, A structural analysis program (sNs) based on this study is developed and the correctness and efficiency of the algorithm is founded through some examples which are fundamental in structural analysis.

Data De-duplication and Recycling Technique in SSD-based Storage System for Increasing De-duplication Rate and I/O Performance (SSD 기반 스토리지 시스템에서 중복률과 입출력 성능 향상을 위한 데이터 중복제거 및 재활용 기법)

  • Kim, Ju-Kyeong;Lee, Seung-Kyu;Kim, Deok-Hwan
    • Journal of the Institute of Electronics and Information Engineers
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    • v.49 no.12
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    • pp.149-155
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    • 2012
  • SSD is a storage device of having high-performance controller and cache buffer and consists of many NAND flash memories. Because NAND flash memory does not support in-place update, valid pages are invalidated when update and erase operations are issued in file system and then invalid pages are completely deleted via garbage collection. However, garbage collection performs many erase operations of long latency and then it reduces I/O performance and increases wear leveling in SSD. In this paper, we propose a new method of de-duplicating valid data and recycling invalid data. The method de-duplicates valid data and then recycles invalid data so that it improves de-duplication ratio. Due to reducing number of writes and garbage collection, the method could increase I/O performance and decrease wear leveling in SSD. Experimental result shows that it can reduce maximum 20% number of garbage collections and 9% I/O latency than those of general case.

Energy-Efficient Subpaging for the MRAM-based SSD File System (MRAM 기반 SSD 파일 시스템의 에너지 효율적 서브페이징)

  • Lee, JaeYoul;Han, Jae-Il;Kim, Young-Man
    • Journal of Information Technology Services
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    • v.12 no.4
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    • pp.369-380
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    • 2013
  • The advent of the state-of-the-art technologies such as cloud computing and big data processing stimulates the provision of various new IT services, which implies that more servers are required to support them. However, the need for more servers will lead to more energy consumption and the efficient use of energy in the computing environment will become more important. The next generation nonvolatile RAM has many desirable features such as byte addressability, low access latency, high density and low energy consumption. There are many approaches to adopt them especially in the area of the file system involving storage devices, but their focus lies on the improvement of system performance, not on energy reduction. This paper suggests a novel approach for energy reduction in which the MRAM-based SSD is utilized as a storage device instead of the hard disk and a downsized page is adopted instead of the 4KB page that is the size of a page in the ordinary file system. The simulation results show that energy efficiency of a new approach is very effective in case of accessing the small number of bytes and is improved up to 128 times better than that of NAND Flash memory.

Design and Implementation of Hybrid Hard Disk I/O System based on n-Block Prefetching for Low Power Consumption and High I/O Performance (저전력과 입출력 성능이 향상된 n-블록 선반입 기반의 하이브리드 하드디스크 입출력 시스템 설계 및 구현)

  • Yang, Jun-Sik;Go, Young-Wook;Lee, Chan-Gun;Kim, Deok-Hwan
    • Journal of KIISE:Computer Systems and Theory
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    • v.36 no.6
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    • pp.451-462
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    • 2009
  • Recently, there are many active studies to enhance low I/O performance of hard disk device. The studies on the hardware make good progress whereas those of the system software to enhance I/O performance may not support the hardware performance due to its poor progress. In this paper, we propose a new method of prefetching n-blocks into the flash memory. The proposed method consists of three steps: (1)analyzing the pattern of read requests in block units; (2)determining the number of blocks prefetched to flash memory; (3)replacing blocks according to block replacement policy. The proposed method can reduce the latency time of hard disk and optimize the power consumption of the computer system. Experimental results show that the proposed dynamic n-block method provides better average response time than that of the existing AMP(Adaptive multi stream prefetching) method by 9.05% and reduces the average power consumption than that of the existing AMP method by 11.11%.

A NAND Flash File System for Sensor Nodes to support Data-centric Applications (데이터 중심 응용을 지원하기 위한 센서노드용 NAND 플래쉬 파일 시스템)

  • Sohn, Ki-Rack;Han, Kyung-Hun;Choi, Won-Chul;Han, Hyung-Jin;Han, Ji-Yeon;Lee, Ki-Hyeok
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.45 no.3
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    • pp.47-57
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    • 2008
  • Recently, energy-efficient NAND Flash memory of large volume is favored as next-generation storage for sensor nodes. So far, most sensor node file systems are based on NOR flash and few file systems are applicable to large NAND flash memory. Although it is required to develop new file systems taking account of the features of NAND flash memory, it is difficult to develop them mainly due to the limit of SRAM memory on sensor nodes. Sensor nodes support SRAM of $4{\sim}10$ KBytes only. In this paper, we designed and implemented a novel file system to support data-centric applications. To do this, we added EEPROM of 1 KBytes to store persistent file description data efficiently and devised a simple wear-leveling method. This reduces the number of page updates, resulting in reduction in energy use and increase in lifetime of sensor nodes.

Application-Adaptive Performance Improvement in Mobile Systems by Using Persistent Memory

  • Bahn, Hyokyung
    • International journal of advanced smart convergence
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    • v.8 no.1
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    • pp.9-17
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    • 2019
  • In this article, we present a performance enhancement scheme for mobile applications by adopting persistent memory. The proposed scheme supports the deadline guarantee of real-time applications like a video player, and also provides reasonable performances for non-real-time applications. To do so, we analyze the program execution path of mobile software platforms and find two sources of unpredictable time delays that make the deadline-guarantee of real-time applications difficult. The first is the irregular activation of garbage collection in flash storage and the second is the blocking and time-slice based scheduling used in mobile platforms. We resolve these two issues by adopting high performance persistent memory as the storage of real-time applications. By maintaining real-time applications and their data in persistent memory, I/O latency can become predictable because persistent memory does not need garbage collection. Also, we present a new scheduler that exclusively allocates a processor core to a real-time application. Although processor cycles can be wasted while a real-time application performs I/O, we depict that the processor utilization is not degraded significantly due to the acceleration of I/O by adopting persistent memory. Simulation experiments show that the proposed scheme improves the deadline misses of real-time applications by 90% in comparison with the legacy I/O scheme used in mobile systems.