• Title/Summary/Keyword: Fixed Point Operation

Search Result 164, Processing Time 0.022 seconds

A study on the improvement of floating point operation for AC servo motor controller based on fixed point DSP (고정소수연산 DSP 기반 AC 서보모터 제어기의 소수연산 개선에 관한 연구)

  • Hwang, In-Sung;Hong, Sun-Ki
    • Proceedings of the KIEE Conference
    • /
    • 2004.10a
    • /
    • pp.43-45
    • /
    • 2004
  • This paper represents the improvement of floating point operation for AC servo motor controller based on fixed point operation DSP. TMS320F2812 has fixed point operation processing structure. The controller parameters are modified to the digitized data by scaling the original parameters. TMS320F 2812 is a 32-bit processor, and it could have enough accuracy to get the digitized data this procedure is implemented and the experiments controling a AC servo system.

  • PDF

A study on the improvement of floating point operation for AC servo motor controller based on fixed point DSP (고정소수연산 DSP 기반 AC 서보모터 제어기의 소수연산 개선에 관한 연구)

  • Hwang In-Sung;Choi Chi-Young;Hong Sun-Ki
    • Proceedings of the KIEE Conference
    • /
    • summer
    • /
    • pp.1196-1198
    • /
    • 2004
  • This paper represents the improvement of floating point operation for AC servo motor controller based on fixed point operation DSP. TMS320F2812 has fixed point operation processing structure. The controller parameters are modified to the digitized data by scaling the original parameters. TMS320F 2812 is a 32-bit processor, and it could have enough accuracy to got the digitized data this procedure is implemented and the experiments controling a AC servo system.

  • PDF

A Fixed-point Digital Signal Processor Development System Employing an Automatic Scaling (자동 스케일링 기능이 지원되는 고정 소수집 디지털 시그날 프로세서 개발 시스템)

  • 김시현;성원용
    • Journal of the Korean Institute of Telematics and Electronics A
    • /
    • v.29A no.3
    • /
    • pp.96-105
    • /
    • 1992
  • The use of fixed-point digital signal processors, such as the TMS 320C25, requires scaling of data at each arithmetic step to prevent overflows while keeping the accuracy. A software which automatizes this process is developed for TMS 320C25. The programmers use a model of a hypothetical floating-point digital signal processor and a floating-point format for data representation. However, the program and data are automatically translated to a fixed-point version by this software. Thus, the execution speed is not sacrificed. A fixed-point variable has a unique binary-point location, which is dependent on the range of the variable. The range is estimated from the floating-point simulation. The number of shifts needed for arithmetic or data transfer step is determined by the binary-points of the variables associated with the operation. A fixed-point code generator is also developed by using the proposed automatic scaling software. This code generator produces floating-point assembly programs from the specifiations of FIR, IIR, and adaptive transversal filters, then floating-point programs are transformed to fixed-point versions by the automatic scaling software.

  • PDF

Development of Interference Cancellation Algorithm for WCDMA Repeater under Fixed-Point Operation (고정 소수점 연산을 이용한 WCDMA 중계기에서의 귀환 신호제거 알고리즘의 개발)

  • Jung, Hee-Seok;Yun, Kee-Bang;Kim, Ki-Doo
    • Journal of the Institute of Electronics Engineers of Korea SP
    • /
    • v.46 no.1
    • /
    • pp.95-103
    • /
    • 2009
  • We improve the performance of WCDMA repeater by cancelling the feedback interference radio signal under the fixed point implementation. Floating-point DSP or FPGA to implement the ICS algorithm may have an disadvantage of high cost, To solve this problem, we suggest the ICS algorithm based on LMS under fixed point operation, and show the validity of our results by comparing with the floating-point results through numerical simulation.

A Fixed-Point Error Analysis of fast DCT Algorithms (고정 소수점 연산에 의한 고속 DCT 알고리듬의 오차해석)

  • 연일동;이상욱
    • The Transactions of the Korean Institute of Electrical Engineers
    • /
    • v.40 no.4
    • /
    • pp.331-341
    • /
    • 1991
  • The discrete cosine transform (DCT) is widely used in many signal processing areas, including image and speech data compression. In this paper, we investigate a fixed-point error analysis for fast DCT algorithms, namely, Lee [6], Hou [7] and Vetterli [8]. A statistical model for fixed-point error is analyzed to predict the output noise due to the fixed-point implementation. This paper deals with two's complement fixed-point data representation with truncation and rounding. For a comparison purpose, we also investigate the direct form DCT algorithm. We also propose a suitable scaling model for the fixed-point implementation to avoid an overflow occurring in the addition operation. Computer simulation results reveal that there is a close agreement between the theoretical and the experimental results. The result shows that Vetterli's algorithm is better than the other algorithms in terms of SNR.

  • PDF

The speed regulation and fixed point parking control of urban railway ATO considering unknown running resistance (미지의 주행저항을 고려한 도시철도차량 ATO의 속도추종 및 정밀정차 제어)

  • 변윤섭;한성호;김길동;백광선;한영재
    • Proceedings of the KSR Conference
    • /
    • 1999.11a
    • /
    • pp.280-287
    • /
    • 1999
  • An automatic train operation(ATO) system executes the operation of constant speed travelling and fixed point parking by using microprocessors instead of drivers manual operation. This paper describes the mathematical model for the train considering unknown disturbances which consist of start resistance, travelling resistance, slope resistance, curve resistance, and so on. The speed controller of ATO system is designed by considering the disturbances. The simulation is executed to verify the speed control and fixed point parking performance and to compare its performance with that of a PID-type ATO control system under disturbances. Simulation results show that the control performance of gain scheduled control scheme fur ATO system is better than that of the conventional PID controller.

  • PDF

Optimization of Fixed-point Design on the Digital Front End in IEEE 802.16e OFDMA-TDD System (IEEE 802.16e OFDMA-TDD 시스템 Digital Front End의 Fixed-point 설계 최적화)

  • Kang Seung-Won;Sun Tae-Hyoung;Chang Kyung-Hi;Lim In-Gi;Eo Ik-Soo
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.31 no.7C
    • /
    • pp.735-742
    • /
    • 2006
  • In this paper, we explain the operation scheme and fixed-point design method of DFE (Digital Front End), which performs DC offset compensation, automatic frequency control, and automatic gain control over the input signal to the UE (User Equipment) receiver of IEEE 802.16e OFDMA-TDD system. Then, we analyze the performance of DFE under ITU-R M. 1225 Veh-A 60km/h channel environment. To optimize the fixed-point design of DFE, we reduce the number of bit resulted from calculation without performance degradation, leading to the decreased complexity of the operation in H/W, and design the Loop filter with considering trade-off between the Acquisition time and the Stability.

The Robust Speed Control on Automatic Train Operation Considering Unknown Running Resistance (열차자동운전에 있어서 미지의 주행저항을 고려한 강인한 속도제어)

  • Byun, Yeun-Sub;Wang, Jong-Bae;Park, Hyun-June
    • The Transactions of the Korean Institute of Electrical Engineers D
    • /
    • v.50 no.3
    • /
    • pp.114-119
    • /
    • 2001
  • An automatic train operation(ATO) system executes the operation of constant speed travelling and fixed point parking by using microprocessors instead of driver's manual operation. This paper describes the mathematical model for the train considering unknown disturbances which consist of start resistance, travelling resistance, slope resistance, curve resistance, and so on. The speed controller of ATO system is designed by considering the disturbances. The simulation is executed to verify the speed control and fixed point parking performance and to compare its performance with that of a PID-type ATO control system under disturbances. Simulation results show that the control performance of gain scheduled control scheme for ATO system is better than that of the conventional PID controller.

  • PDF

Real-Time Implementation of MPEG-1 Layer III Audio Decoder Using TMS320C6201 (TMS320C6201을 이용한 MPEG-1 Layer III 오디오 디코더의 실시간 구현)

  • 권홍석;김시호;배건성
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.25 no.8B
    • /
    • pp.1460-1468
    • /
    • 2000
  • The goal of this research is the real-time implementation of MPEG-1 Layer III audio decoder using the fixed-point digital signal processor of TMS320C6201 The main job for this work is twofold: one is to convert floating-point operation in the decoder into fixed-point operation while maintaining the high resolution, and the other is to optimize the program to make it run in real-time with memory size as small as possible. We, especially, devote much time to the descaling module in the decoder for conversion of floating-point operation into fixed-point operation with high accuracy. The inverse modified cosine transform(IMDCT) and synthesis polyphase filter bank modules are optimized in order to reduce the amount of computation and memory size. After the optimization process, in this paper, the implemented decoder uses about 26% of maximum computation capacity of TMS320C6201. The program memory, data ROM, data RAM used in the decoder are about 6.77kwords, 3.13 kwords and 9.94 kwords, respectively. Comparing the PCM output of fixed-point computation with that of floating-point computation, we achieve the signal-to-noise ratio of more than 60 dB. A real-time operation is demonstrated on the PC using the sound I/O and host communication functions in the EVM board.

  • PDF

A Study on the On-Line Fuzzy ULTC Controller Design Based on Multiple Load Center Points (다중 부하중심점에 기반한 온라인 퍼지 ULTC 제어기 설계에 대한 연구)

  • Ko, Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers A
    • /
    • v.55 no.12
    • /
    • pp.514-521
    • /
    • 2006
  • The existing ULTC operation control strategy based on the measured data deteriorates the voltage compensation capability making the efficient corresponding to the load variation difficult by following the fixed load center point voltage. Accordingly, this paper proposes a new on-line fuzzy ULTC controller based on the designed multiple load center points which can improve the voltage compensation capability of ULTC and minimize voltage deviation by moving in real-time the load center point according to the load variation to an adequate position among the multiple load center points designed using the clustering technique. The Max-Min distance technique is adopted as the clustering technique for the decision of multiple load points from measured MTr load current and PTr voltage, and the minimum distance classifier is adopted for the decision of fuzzy output membership function. To verify the effectiveness of the proposed strategy, Visual C++ MFC-based simulation environments is developed. Finally, the superiority the proposed strategy is proved by comparing the fuzzy ULTC operation control results based on multiple load center points with the existing ULTC operation control results based on fixed load center point using the data for three day.