• 마이크로전자및패키징학회지
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• 제20권4호
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• pp.59-63
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• 2013

In this paper, the impact of the copper densities of substrate layers on IC package warpage is studied experimentally and numerically. The substrate strips used in this study contained two metal layers, with the metal densities and patterns of these two layers varied to determine their impacts. Eight legs of substrate strips were prepared. Leg 1 to leg 5 were prepared with a HD (high density) type of strip and leg 6 to leg 8 were prepared with UHD (ultra high density) type of strip. The top copper metal layer was designed to feature meshed patterns and the bottom copper layer was designed to feature circular patterns. In order to consider the process factors, the warpage of the substrate bottom was measured step by step with the following manufacturing process: (a) bare substrate, (b) die attach, (c) applying mold compound (d) and post reflow. Furthermore, after the post reflow step, the substrate strips were diced to obtain unit packages and the warpage of the unit packages was measured to check the warpage trends and differences. The experimental results showed that the warpage trend is related to the copper densities. In addition to the experiments, a Finite Element Modeling (FEM) was used to simulate the warpage. The nonlinear material properties of mold compound, die attach, solder mask, and substrate core were included in the simulation. Through experiment and simulation, some observations were concluded.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.191-193
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• 2006

YBCO wire has a metal substrate to improve the texture structure and highly conductive layers to increase the cryogenic stability. When AC current flows in the YBCO wire, magnetic field which is generated by the AC current magnetizes the metal substrate and induces the eddy current in the stabilizing layer. To examine the effect of the metal substrate and the conducting layer on the transport current loss of YBCO wire, this paper presents the transport current loss of YBCO wire which has metal substrate and conductive layer. YBCO wire with Ni-W substrate and copper layer were chosen as the model HTS wire for numerical calculation. Finite element method has been used to calculate the transport loss and the results of numerical calculation was compared with analytic calculation suggested by Norris.

• ETRI Journal
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• 제28권1호
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• pp.9-16
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• 2006

In this paper, we analyzed and measured the electrical crosstalk characteristics of a 1.25 Gbps triplexer module for Ethernet passive optical networks to realize fiber-tothe-home services. Electrical crosstalk characteristic of the 1.25 Gbps optical triplexer module on a resistive silicon substrate should be more serious than on a dielectric substrate. Consequently, using the finite element method, we analyze the electrical crosstalk phenomena and propose a silicon substrate structure with a dummy ground line that is the simplest low-crosstalk layout configuration in the 1.25 Gbps optical triplexer module. The triplexer module consists of a laser diode as a transmitter, a digital photodetector as a digital data receiver, and an analog photodetector as a cable television signal receiver. According to IEEE 802.3ah and ITU-T G.983.3, the digital receiver and analog receiver sensitivities have to meet -24 dBm at $BER=10^{-12}$ and -7.7 dBm at 44 dB SNR. The electrical crosstalk levels have to maintain less than -86 dB from DC to 3 GHz. From analysis and measurement results, the proposed silicon substrate structure that contains the dummy line with $100\;{\mu}m$ space from the signal lines and 4 mm separations among the devices satisfies the electrical crosstalk level compared to a simple structure. This proposed structure can be easily implemented with design convenience and greatly reduce the silicon substrate size by about 50 %.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2006년도 춘계학술대회 논문집
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• pp.99-100
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• 2006

Cold gas dynamic spray or cold-spray is a deposition process, which causes deformation of a thin substrate. The deformation is usually convex to the deposited side. In this research, the main cause of the deformation was investigated using 6061-T6 aluminum alloy. The effects or anisotropic coefficient or thermal expansion (CTE) or the deposited layer by cold-spray and residual stress were studied by experiments and finite element analysis. The Hole Drilling method was applied to measure residual stress in the cold-spray layer and substrate. The data obtained by the experiments were used for the analysis of substrate deformation. From the result of the analysis, it was concluded that compressive residual stress was the main reason of substrate deformation while CTE had little effect.

• 대한기계학회논문집A
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• 제37권3호
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• pp.419-427
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• 2013

자동차 배기계의 앞쪽에 배치된 촉매변환기는 배기가스 중 유해한 성분을 무해한 것으로 변환하는 제품이다. 담체를 매트에 두르고 캔에 넣는 캐닝공정을 통하여 제작된다. 매트의 압력이 너무 높으면 담체가 파손되기 쉽고, 너무 작으면 담체가 미끄러지기 쉽다. 담체, 매트와 캔에 대한 통계학적인 오차분포를 반영하여 공정능력수준을 예측하고 담체의 파손이나 미끄러짐도 예측하는 프로그램을 EXCEL로 개발하였다. 상용 프로그램 결과와 비교하여 공정능력평가와 유한요소해석의 타당성을 입증하였다. 기존에 독립적으로 수행하던 유한요소 해석과 공정능력분석을 통합하였다.

• 한국기계가공학회지
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• 제21권6호
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• pp.50-59
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• 2022

The design of the substrate significantly affects the thermal history and the residual stress formation in the vicinity of a repaired region by a directed energy deposition (DED) process. The occurrence of defects in the repaired region depends on the thermal history and residual stress formation. The objective of this study was to investigate the influence of the inclined angle and depth of the substrate on the thermal and residual stress characteristics in the vicinity of a repaired region by a DED process through two-dimensional finite element analyses (FEAs). The temperature and residual stress distributions in the vicinity of the repaired region were predicted according to the combination of the inclined angle and depth of the substrate. The effects of the inclined angle and depth on the depth of the heat affected zone and the maximum value of the residual stress were examined. A proper combination of the inclined angle and depth of the substrate was estimated to decrease the residual stress in the vicinity of the repaired region.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 2003년도 ICCAS
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• pp.1664-1667
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• 2003

Aperture-coupled microstrip antenna is one type of microstrip antennas. This type of antenna has bandwidth wider than simple microstrip antenna. Herein, we use two substrates, that have the same dielectric constant 2.47 (PTFE-quartz) in which upper substrate is a rectangular patch. The microstrip patch is fed by a microstrip line which is printed on lower substrate, through an aperture or slot in the common ground plane of patch and microstrip feed. This antenna is analyzed by using Finite Difference Time Domain (FDTD) method the specific design frequency 10 GHz and match impedance is 50 ohms. The simulation results of its characteristics are input impedance, return loss, VSWR and radiation patterns respectively.

• International Journal of Computer Science & Network Security
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• 제21권9호
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• pp.358-361
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• 2021

In this paper, we have simulated a rectangular microstrip patch antenna for aerospace applications based on graphen as a conductor and a multilayer substrate .as a result of the use of the graphen patch we obtained a reconfigurable antenna on the frequency range (0.6-0.7 terahertz) with a gain up to 12 db. The simulation of this antenna has been performed by using CST Microwave Studio, which is a commercially available finite integral based electromagnetic simulator.

• 마이크로전자및패키징학회지
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• 제28권4호
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• pp.31-39
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• 2021

본 논문에서는 FEM(유한요소법)을 사용하여 PoP (Package on Package)용 PCB를 unit(유닛)과 substrate(서브스트레이트)로 분리한 warpage 해석과 warpage에 미치는 층별 두께의 영향도 분석과 층별 두께 조건을 다구찌법에 의한 SN비(Signal-to-Noise ratio)로 분석하였다. 해석 결과에 의하면 유닛 PCB는 회로층의 영향이 대단히 높았는데 특히 외층의 영향도가 높았다. 반면에 서브스트레이트 PCB는 회로층의 영향도가 높았으나 유닛 PCB에 비해 상대적으로 낮았으며 오히려 솔더 레지스트의 영향도가 증가하였다. 따라서 유닛 PCB와 서브스트레이트 PCB를 동시에 고려하여 PoP PCB의 층별 구조는 외부와 내부 회로층은 두껍게, 윗면 솔더 레지스트는 얇게 설계하고 바닥면 솔더 레지스트의 두께를 5 ㎛와 25 ㎛ 사이의 두께를 선정하는 바람직하다.

• 마이크로전자및패키징학회지
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• 제30권1호
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• pp.63-70
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• 2023

오늘날 심각한 환경 오염과 에너지의 중요성으로 전력 반도체의 중요도가 지속적으로 높아지고 있다. 특히 wide band gap(WBG)소자 중 하나인 SiC-MOSFET은 우수한 고전압 특성을 가지고 있어 그 중요도가 매우 높다. 하지만 SiC-MOSFET의 전기적 특성이 열에 민감하기 때문에 패키지를 통한 열 관리가 필요하다. 본 논문에서는 기존 전력 반도체에서 사용하는 direct bonded copper(DBC) 기판 방식이 아닌 insulated metal substrate(IMS) 방식을 제안한다. IMS는 DBC에 비해 공정이 쉬우며 coefficient of thermal expansion (CTE)가 높아서 비용과 신뢰성 측면에서 우수하다. IMS의 절연층인 dielectric film의 열전도도가 낮은 문제가 있지만 매우 얇은 두께로 공정이 가능하기 때문에 낮은 열 전도도를 충분히 극복할 수 있다. 이를 확인하기 위해서 이번 연구에서는 electric-thermal co-simulation을 수행하였으며 검증을 위해 DBC 기판과 IMS를 제작하여 실험하였다.