• Laser Solutions
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• v.2 no.3
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• pp.52-61
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• 1999

The laser induced forward transfer(LIFT) technique employs a pulsed laser to transfer parts of a thin metal film from an optically transparent target onto an arbitrary substrate in close proximity to the metal film on the target. In this work, a two-step method, the combination of LIFT process, in which a Au film deposited on the $Al_2$O$_3$ substrate by Nd:YAG laser and subsequent Au electroless metal plating on the by LIFT process generated Au seed, was presented. The influence of laser parameters, wavelength, laser power, film thickness and overlap ratio of pulse tracks, on the shapes of deposit and conductor line after electroless plating is experimentally studied. As a results, the threshold power densities for ablation, deposition and metallization were determined and comparison of threshold value between the wave length 1064nm and the second harmonic generated 532nm. In odor to determine a possible application in the electronic industry, a smallest conduct spot size, line width and isolated line space were generated.

• Proceedings of the KSME Conference
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• 2008.11a
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• pp.256-259
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• 2008

An micro-probe tip must be manufactured using thin film to evaluate integrity of the semiconductor with narrow distance between pads. In this study, fatigue tests were performed for BeCu thin film which is used in micro-probe tip of semiconductor test machine. The thin film was manufactured by electro plating process, and the specimens were fabricated by wire-cut electric discharge method to make hour glass type specimen of $5000{\mu}m$ width, $29200{\mu}m$ length and $30{\mu}m$ thickness. The fatigue test of load control with 10Hz frequency was performed, in ambient environment. The fatigue cycles were tension-tension with mean stress, at stress ratio, R=0.1.

• Proceedings of the KIEE Conference
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• 1996.07c
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• pp.1479-1481
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• 1996

The Purpose of this paper is to produce air core inductor and measure its electrical properties for high frequency. Especially we focused attention on the effect of geometrical parameters such as coil width, distance between coils, turn number. In addition, the influence of film morphology at inductor was investigated. Increase of coil width and decrease of turn number resulted in promotion of electric properties.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.20 no.4
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• pp.7-11
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• 2006

In this paper, it is reported that film-bulk-acoustic resonator with high c-axis oriented AIN film on $Mo/SiO_2/Si(100)$ using metal-organic-chemical-vapor deposition was fabricated. The resonant frequency and anti-resonant frequency of the fabricated resonator were observed with 3.189[GHz] and 3.224[GHz], respectively. The quality factor and the effective electromechanical coupling coefficient(${k_{eff}}^2$) were measured with 24.7 and 2.65[%], respectively. The conditions of AIN deposition were substrate temperature of $950[^{\circ}C]$, pressure of 20Torr, and V-III ratio of 25000. A high c-axis oriented AIN film with $4{\times}10^{-5}[\Omega{cm}]$ resistivity of Mo bottom electrode and $4[^{\circ}]$ of AIN(0002) full-width at half-maximum(FWHM) on $Mo/SiO_2/Si(100)$ was grown successfully. The FWHM value of deposited AIN film is useful for the RF band pass filter specification for GHz-band wireless local area network.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.178-178
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• 2010

With the scaling down of ULSI(Ultra Large Scale Integration) circuit of CMOS(Complementary Metal Oxide Semiconductor)based electronic devices, the electronic devices become more faster and smaller size that are promising field of semiconductor market. However, very narrow line width has some disadvantages. For example, because of narrow line width, deposition of conformal and thin barrier is difficult. Besides, proportion of barrier width is large, thus resistance is high. Conventional PVD(Physical Vapor Deposition) thin films are not able to gain a good quality and conformal layer. Hence, in order to get over these side effects, deposition of thin layer used of ALD(Atomic Layer Deposition) is important factor. Furthermore, it is essential that copper atomic diffusion into dielectric layer such as silicon oxide and hafnium oxide. If copper line is not surrounded by diffusion barrier, it cause the leakage current and devices degradation. There are some possible methods for improving the these secondary effects. In this study, TaNx, is used of Tertiarybutylimido tris (ethylamethlamino) tantalum (TBITEMAT), was deposited on the 24nm sized trench silicon oxide/silicon bi-layer substrate with good step coverage and high quality film using plasma enhanced atomic layer deposition (PEALD). And then copper was deposited on TaNx barrier using same deposition method. The thickness of TaNx was 4~5 nm. TaNx film was deposited the condition of under $300^{\circ}C$ and copper deposition temperature was under $120^{\circ}C$, and feeding time of TaNx and copper were 5 seconds and 5 seconds, relatively. Purge time of TaNx and copper films were 10 seconds and 6 seconds, relatively. XRD, TEM, AFM, I-V measurement(for testing leakage current and stability) were used to analyze this work. With this work, thin barrier layer(4~5nm) with deposited PEALD has good step coverage and good thermal stability. So the barrier properties of PEALD TaNx film are desirable for copper interconnection.

• Tribology and Lubricants
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• v.32 no.4
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• pp.119-124
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• 2016

In the sapphire wafering process, lapping is a crucial operation in order to reduce the damaged layer and achieve the target thickness. Many parameters, such as pressure, velocity, abrasive, slurry and plate, affect lapping characteristics. This paper presents an experimental investigation on the effect of the plate groove on the material removal rate and roughness of the wafer. We select the spiral pattern and rectangular type as the groove shapes. We vary the groove density by controlling the groove shape dimension, i.e., the groove width and pitch. As the groove density increases to 0.4, the material removal rate increases and gradually reaches a saturation point. When the groove density is low, the pressing load is mostly supported by the thick film, and only a small amount acts on the abrasives resulting to a low material removal rate. The roughness decreases on increasing the groove density up to 0.3 because thick film makes partial participations of large abrasives which make deep scratches. From these results, we could conclude that the groove affects the contact condition between the wafer and plate. At the same groove density, the pitch has more influence on reducing the film thickness than the groove width. By decreasing the groove density with a smaller pitch and larger groove width, we could achieve a high material removal rate and low roughness. These results would be helpful in understanding the groove effects and determining the appropriate groove design.

• Journal of the Semiconductor & Display Technology
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• v.22 no.2
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• pp.30-34
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• 2023

Since dishing in the CMP process is a major factor that hinders the uniformity of the semiconductor thin film, many studies have focused this issue to improve the non-uniformity of the film due to dishing. In the metal layer, the dishing mainly occurs in the central part of the metal due to a difference in a selection ratio between the metal and the dielectric, thereby generating a step on the surface of the metal layer. Factors that cause dishing include the shape of the thin film, the chemical reaction of the slurry, thermal deformation, and the rotational speed of the pad and head, and dishing occurs due to complex interactions between them. This study analyzed the stress generated on the metal layer surface in the CMP process using ANSYS software, a commercial structure analysis program. The stress caused by the vertical load applied from the pad was analyzed by changing the area density and line width of the dummy metal. As a result of the analysis, the stress in the active region decreased as the pattern density and line width of the dummy metal increased, and it was verified that it was valid compared with the previous study that studied the dishing according to the dummy pattern density and line width of the metal layer. In conclusion, it was confirmed that there is a relationship between dishing and normal stress.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.87-88
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• 2006

Recently, poly-Si TFT-LCD starts to be mass produced using excimer laser annealing (ELA) poly-Si. The main reason for this is the good quality poly-Si and large area uniformity. We report the influence of channel length and width on poly-Si TFTs performance. Transfer characteristics of p-channel poly-Si thin film transistors fabricated on polycrystalline silicon (poly-Si) thin film transistors (TFTs) with various channel lengths and widths of 2-30 ${\mu}m$ has been investigated. In this paper, we analyzed the data of p-type TFTs. We studied threshold voltage ($V_{TH}$), on/off current ratio ($I_{ON}/I_{OFF}$), saturation current ($I_{DSAT}$), and transconductance ($g_m$) of p-channel poly-Si thin film transistors with various channel lengths and widths.

• Korean Journal of Materials Research
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• v.14 no.7
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• pp.477-481
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• 2004

High quality polycrystalline silicon is very critical part of the high quality thin film transistor(TFT) for display devices. Metal induced lateral crystallization(MILC) is one of the most successful technologies to crystallize the amorphous silicon at low temperature(below $550^{\circ}C$) and uses conventional and large glass substrate. In this study, we observed that the MILC behavior changed with abrupt variation of the amorphous silicon active pattern width. We explained these phenomena with the novel MILC mechanism model. The 10 nm thick Ni layers were deposited on the glass substrate having various amorphous silicon patterns. Then, we annealed the sample at $550^{\circ}C$ with rapid thermal annealing(RTA) apparatus and measured the crystallized length by optical microscope. When MILC progress from narrow-width-area(the width was $w_2$) to wide-width-area(the width was $w_1$), the MILC rate decreased dramatically and was not changed for several hours(incubation time). Also the incubation time increased as the ratio, $w_1/w_2$, get larger. We can explain these phenomena with the tensile stress that was caused by volume shrinkage due to the phase transformation from amorphous silicon to crystalline silicon.

• Proceedings of the KSME Conference
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• 2007.05a
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• pp.1783-1786
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• 2007

The copper film coated by Sn is often used in various applications such as LCD, Mobile Phone and etc. Especially, when the film is used as tape carrier package(TCP) of LCD panel, the film is repeatedly applied by mechanical or(and) thermal stress and then is often failed. Therefore, to guarantee the reliability of the electrical devices using the film, the tensile and fatigue characteristics of the film are important. In this study, to obtain the tensile and fatigue characteristics of the film, the specimen was fabricated by etching process to make a smooth specimen of 2000 ${\mu}m$ width, 8000 ${\mu}m$ length and 15.26 ${\mu}m$ thickness. The 2 kinds of specimen were fabricated by other manufacturing process. These specimens had values of Young's modulus(80.2GPa) lower than literature values(108${\sim}$145GPa) for bulk values, but had high values of the yield and ultimate strength as 317MPa and 437MPa, respectively. And fatigue test of load-control with 20Hz frequency was performed.