• The Journal of Korea Institute of Information, Electronics, and Communication Technology
• /
• v.15 no.3
• /
• pp.205-210
• /
• 2022

A novel OLED pixel circuit is proposed in this paper that uses only n-type thin-film transistors(TFTs) to improve the luminance non-uniformity of the AMOLED display caused by the threshold voltage variation of an OLED driving TFT. The proposed OLED pixel circuit is composed of 6 n-channel TFTs and 2 capacitors. The operation of the proposed OLED pixel circuit consists of the capacitor initializing period, threshold voltage sensing period of an OLED·driving TFT, image data voltage writing period, and OLED·emitting period. As a result of SmartSpice simulation, when the threshold voltage of·OLED·driving TFT varies from 1.2 V to 1.8 V, the proposed OLED pixel circuit has a maximum current error of 5.18 % at IOLED = 1 nA. And, when the OLED cathode voltage rises by 0.1 V, the proposed OLED pixel circuit has very little change in the OLED current compared to the conventional OLED pixel circuit. Therefore, the proposed pixel circuit exhibits superior compensation characteristics for the threshold voltage variation of an OLED driving TFT and the rise of the OLED cathode voltage compared to the conventional OLED pixel circuit.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.02a
• /
• pp.681-682
• /
• 2013

전기는 우리 주변의 에너지 형태 중에서 가장 편리하고 광범위하게 사용되고 있다. 이러한 전기는 전자제품, 전기자동차, 에너지 저장 플랜트 등 매우 많은 분야에서 저장되고 사용되고 있다. 특히 에너지 저장 용량의 확대는 휴대폰, 노트북 PC 등 휴대용 IT 기기의 성장에 결정적인 역할을 하였다. 가볍고 작으면서도 고용량의 전기 에너지 저장 장치가 없었다면, 통신이나 인터넷 그리고 오락 등 다양한 기능을 작은 휴대용 기기에 구현할 수 없었을 것이다. 그러나 시간이 흐를수록 기기의 요구 성능이 높아지고 소비자의 니즈가 더욱더 다양해지고 고도화될수록 단일 부품으로 가장 큰 부피를 차지하는 에너지 저장 장치의 용량과 디자인은 점점 중요해지고 있다. 이러한 에너지 저장 장치에서 가장 친숙한 형태는 2차 전지 계열이다. 납 축전지를 비롯하여, 니켈수소, 니켈카드뮴, electrochemical capacitor와 Li ion 계열 등이 대표적이다. 특히 Li ion 배터리는 모바일, 자동차 및 에너지 저장 그리드 등과 같은 다양한 분야에 가장 많이 적용되고있다. Li ion 배터리에 대하여 현재의 핵심적인 연구분야는 전극 재료(cathode, anode)와 electrolyte에 대한 것이다. Anode 전극 재료 중에서 가장 많이 사용되는 재료는 카본을 기반으로 하는 재료로 안정성에 대한 장점이 있지만 에너지 밀도가 낮다는 단점이 있다. 에너지 저장 용량 증가에 대한 필요성이 증가하기 때문에 현재 많이 사용되고 있는 에너지 밀도가 낮은 카본 재료를 대체하기 위해서 이론 용량이 높다고 알려진 실리콘과 같은 메탈이나 주석 산화물과 같은 천이 금속 산화물에 대하여 많은 연구가 진행되고 있다. 특히 현재까지 알려진 많은 재료 중에서 가장 큰 capacity (~4,000 mAh/g)를 가지고 있다고 알려진 실리콘이 카본의 대체 재료로 많은 연구가 진행되고 있다. 그러나, Li 과 반응을 하며 약 300~400%에 달하는 부피팽창이 발생하고, 이러한 부피 팽창 때문에 충 방전이 진행됨에 따라 current collector로부터 박리되는 현상을 보여 빠른 용량 감소를 보여주고 있다. 본 연구에서는 adhesion layer를 current collector와 실리콘 전극 재료 사이에 삽입하여 충 방전 시 부피팽창에 의한 미세구조의 변화와 electrochemical 특성에 대한 영향을 알아보았다. 실험에 사용한 anode 전극은 상용 Cu foil current collector에 RF/DC magnetron 스퍼터링을 통해 다양한 종류(Ti, Ta 등)의 adhesion layer과 200 nm 두께의 Si 박막을 증착하였다. 또한 Bio-logic Potentiostat/ Galvanostat VMP3 와 WanAtech automatic battery cycler 장비를 사용하여 0.2 C-rate로 half-cell 타입의 코인 셀로 조립한 전극에 대한 충 방전 실험을 진행하였다. Adhesion layer의 사용으로 인해 실리콘 박막과 Cu current collector 사이의 박리 현상을 줄여줄 수 있었고, 충 방전 시 Cu 원자의 실리콘 박막으로의 확산을 통한 brittle한 Cu-Si alloy 형성을 막아 줄 수 있어 큰 특성 향상을 확인할 수 있었다. 또한, 리튬과 실리콘의 반응을 통한 형태와 미세구조 변화를 SEM, TEM 등의 다양한 장비를 사용하여 확인하였고, 이를 통해 adhesion layer의 사용이 전극의 특성향상에 큰 영향을 끼쳤다는 것을 확인할 수 있었다.

• Journal of the Korean Electrochemical Society
• /
• v.5 no.1
• /
• pp.21-26
• /
• 2002

A supercapacitor was developed using an amorphous ruthenium oxide material. The electrode of supercapacitor was prepared using an amorphous ruthenium oxide, which was synthesized from ruthenium trichloide hydrate$(RuCl_3{\cdo5}xH_2O)$. Thin film of tantalum was used as a current collector because it had wide. potential window characteristics than titanium and 575304 materials. A supercapacitor was assembled with ruthenium oxide as an electrode active material and 4.8M sulfuric acid solution as an electrolyte. The specific capacitance of the electrode was tested by a cyclic voltammetry using a half cell. The maximum differential specific capacitances during the oxidative and the reductive scans were 710 and $645\;F/g-RuO_2{\cdot}nH_2O$, respectively. The average specific capacitance was $521\;F/g-RuO_2{\cdot}nH_2O$. The assembled supercapacitor was protonated to the potential level of 0.5V vs. SCE. Super-capacitor, which was adjusted to the appropriate protonation level, had the specific capacitance of $151\;F/g-RuO_2{\cdot}nH_2O$ based on the concept of full cell.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.22 no.1
• /
• pp.114-124
• /
• 2011

In this paper, we present a 2 GHz compact analog phase shifter with linear phase-tune characteristic. The compact phase shifter was designed base on a lumped all pass network and implemented using a ceramic substrate fabricated with thin-film technique. For a linear phase-tune characteristic, a capacitance of the varactor diode for a tuning voltage was linearized by connecting series capacitor and subsequently produced an almost linear capacitance change. The inductor and bias circuit in the all pass network was implemented using a spiral inductors for small size, which results in the size reduction to $4\;mm{\times}4\;mm$. In order to measure the phase shifter using the probe station, two CPW pads are included at the input and output. The fabricated phase shifter showed an insertion loss of about 4.2~4.7 dB at 2 GHz band and a total $79^{\circ}$ phase change for DC control voltage from 0 to 5 V, and showed linear phase-tune characteristic as expected in the design.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2006.08a
• /
• pp.537-539
• /
• 2006

We developed an 4.5" $192{\times}64$ active matrix organic light-emitting diode display on a glass using organic thin-film transistor (OTFT) switching-arrays with two transistors and a capacitor in each sub-pixel. The OTFTs has bottom contact structure with a unique gate insulator and pentacene for the active layer. The width and length of the switching OTFT is $800{\mu}m$ and $10{\mu}m$ respectively and the driving OTFT has $1200{\mu}m$ channel width with the same channel length. On/off ratio, mobility, on-current of switching OTFT and on-current of driving OTFT were $10^6,0.3{\sim}0.5\;cm^2/V{\cdot}sec$, order of 10 ${\mu}A$ and over 100 ${\mu}A$, respectively. AMOLEDs composed of the OTFT switching arrays and OLEDs made using vacuum deposition method were fabricated and driven to make moving images, successfully.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.07b
• /
• pp.851-856
• /
• 2003

We have investigated the material and electrical properties of $Bi_{4-x}La_xTi_3O_{12}$ (BLT) ferroelectric thin film for ferroelectric nonvolatile memory applications of capacitor type and single transistor type. The 120nm thick BLT films were deposited on $Pt/Ti/SiO_2/Si$ and $SiO_2/Nitride/SiO_2$ (ONO) substrates by the sol-gel spin coating method and were annealed at $700^{\circ}C$. It was observed that the crystallographic orientation of BLT thin films were strongly affected by the excess Bi content and the intermediate rapid thermal annealing (RTA) treatment conditions regardeless of two type substrates. However, the surface microstructure and roughness of BLT films showed dependence of two different type substrates with orientation of (111) plane and amorphous phase. As increase excess Bi content, the crystallographic orientation of the BLT films varied drastically in BLT films and exhibited well-crystallized phase. Also, the conversion of crystallographic orientation at intermediate RTA temperature of above $450^{\circ}C$ started to be observed in BLT thin films with above excess 6.5% Bi content and the rms roughness of films is decreased. We found that the electrical properties of BLT films such as the P-V hysteresis loop and leakage current were effectively modulated by the crystallographic orientations change of thin films.

• Journal of the Korean Ceramic Society
• /
• v.35 no.7
• /
• pp.647-647
• /
• 1998

(La,Sr)CoO3/Pb(Zr,Ti)O3/(La,Sr)CoO3 (LSCO) heterostructures have been grown on LaAlO3 substrates by pulsed laser deposition (PLD) to investigate asymmetric polarization of Pb(Zr,Ti)O3 (PZT) thin flims with different electrode configuration. P-V hysteresis loop of LSCO/PZT/LSCO was symmetric. However, LaCoO3 (LCO_/PZT/LSCO showed a largely asymmetric P-V hystersis loop and large relaxation of the remanent polarization at the negatively poled state, which means that the negatively poled state was unstable. On the other hand, LSCO/PZT/LCO exhibited large relaxation of the positively poled state. The asymmetric behavior of the polarized states implies the presence of an interal electric firld inside the PZT layer. It is suggested that internal electric field is caused by built-in voltages at LCO/PZT and LSCO/PZT interfaces. The built-in voltages at LCO/PZT and CSCO/PZT interfaces were 0.6 V and -0.12 V, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.45 no.5
• /
• pp.12-18
• /
• 2008

Ag paste was employed for source and drain electrode of OTFTs and for the data metal lines of OTFT-OLED array on PC(polycarbonate) substrate. We tested two kinds of Ag-pastes such as pastes for 325 mesh and 500 mesh screen mask to examine the pattern ability and electrical performance for OTFTs. The minimum feature size was 60 ${\mu}m$ for 325 mesh screen mask and 40 ${\mu}m$ for 500 mesh screen mask. The conductivity was 60 $m{\Omega}/\square$ for 325 mesh and 133.1 $m{\Omega}/\square$ for 500 mesh. For the OTFT performance the mobility was 0.35 $cm^2/V{\cdot}sec$ and 0.12 $cm^2/V{\cdot}sec$, threshold voltage was -4.7 V and 0.9 V, respectively, and on/off current ratio was ${\sim}10^5$, for both screen masks. We applied the 500 mash Ag paste to OTFT-OLED array because of its good patterning property. The pixel was composed of two OTFTs and one capacitor and one OLED in the area of $2mm{\times}2mm$. The panel successfully worked in active mode operation even though there were a few bad pixels.

• Journal of the Korean Vacuum Society
• /
• v.2 no.2
• /
• pp.246-254
• /
• 1993

In order to increase the capacitance of storage electrode in the DRAM capacitor, two approaches were performed. First, hemispherical and rugged poly silicon films were made by LPCVD to increase the effective surface area of storage electrode. The even surface morphology of conventional poly silicon electrode was changed into the uneven surface of hemispherical of rugged poly silicon films. Second, PECVD $Ta_2O_5$ dielectric films were deposited and thermally treated to study the dielectrical characteristics of $Ta_2O_5$ film on each electrode. MIS capacitors with $Ta_2O_5$ films were electrically characterized by I-V, C-V and TDDB measurements. As a result, the capacitance of the electrode with uneven surface were increased by a factor of 1.2~1.5 and leakage current was increased compared with those of even surface. TDDB result indicates that the electrode with uneven surface has dielectrically more degraded than that of even surface. These results can be helpful as a basic research to develop new generation DRAM capacitors with $Ta_2O_5$ films.

• Journal of the Microelectronics and Packaging Society
• /
• v.6 no.4
• /
• pp.1-7
• /
• 1999

We developed Fabrication process of embedded passive components in MCM-D substrate. The proposed MCM-D substrate is based on Cu/photosensitive BCB multilayer. The substrate used is Si wafer and Ti/cu metallization is used to form the interconnect layer. Interconnect layers are formed with 1000$\AA$ Ti/3000$\AA$ Cu by sputtering method and 3$\mu\textrm{m}$ Cu by electrical plating method. In order to form the vias in photosensitive BCB layer, the process of BCB and plasma etch using $C_2F_6$ gas were evaluated. The MCM-D substrate is composed of 5 dielectric layers and 4 interconnect layers. Embedded resistors are made with NiCr and implemented on the $2^{nd}$ dielectric layer. The sheet resistance of NiCr is controlled to be about 21 $\Omega$/sq at the thickness of 600$\AA$. The multi-turn sprial inductors are designed in coplanar fashion on the $4^{th}$ interconnect layer with an underpass from the center to outside using the lower $3^{rd}$ interconnect layer. Capacitors are designed and realized between $1^{st}$ interconnect layer and $2^{nd}$ interconnect layer. An important issue in capacitor is the accurate determination of the dielectric thickness. We use the 900$\AA$ thickness of PECVD silicon nitride film as dielectric. Capacitance per unit area is about 88nF/$\textrm {cm}^2$at the thickness of 900$\AA$. The advantage of this integration process is the compatibility with the conventional semiconductor process due to low temperature PECVD silicon nitride process and thermal evaporation NiCr process.