• The Journal of the Acoustical Society of Korea
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• v.38 no.1
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• pp.51-55
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• 2019

This paper proposes a speech enhancement method utilizing the feature compensation gain for robust speech recognition performances in noisy environments. In this paper we propose a speech enhancement method utilizing the feature compensation gain which is obtained from the PCGMM (Parallel Combined Gaussian Mixture Model)-based feature compensation method employing variational model composition. The experimental results show that the proposed method significantly outperforms the conventional front-end algorithms and our previous research over various background noise types and SNR (Signal to Noise Ratio) conditions in mismatched ASR (Automatic Speech Recognition) system condition. The computation complexity is significantly reduced by employing the noise model selection technique with maintaining the speech recognition performance at a similar level.

• Carbon letters
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• v.25
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• pp.84-88
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• 2018

At present, an important research area is the search for materials that are compatible with CMOS technology and achieve a satisfactory response rate and modulation efficiency. A strong local field of graphene surface plasmon polariton (SPP) can increase the interaction between light and graphene, reduce device size, and facilitate the integration of materials with CMOS. In this study, we design a new modulator of SPP-based cycle branch graphene waveguide. The structure comprises a primary waveguide of graphene-$LiNbO_3$-graphene, and a secondary cycle branch waveguide is etched on the surface of $LiNbO_3$. Part of the incident light in the primary waveguide enters the secondary waveguide, thus leading to a phase difference with the primary waveguide as reflected at the end of the branch and interaction coupling to enhance output light intensity. Through feature analysis, we discover that the area of the secondary waveguide shows significant localized fields and SPPs. Moreover, the cycle branch graphene waveguide can realize gain compensation, reduce transmission loss, and increase transmission distance. Numerical simulations show that the minimum effective mode field area is about $0.0130{\lambda}^2$, the gain coefficient is about $700cm^{-1}$, and the quality factor can reach 150. The structure can realize the mode field limits of deep subwavelength and achieve a good comprehensive performance.

• Journal of the Institute of Convergence Signal Processing
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• v.7 no.2
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• pp.81-86
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• 2006

In this paper, a new process detection circuit is proposed. The proposed process detection circuit compares a long channel MOS transistor (L > 0.4um) to a short channel MOS transistor which uses lowest feature size of the process. The circuit generates the differential current proportional to the deviation of carrier mobilities according to the process variation. This method keep the two transistor's drain voltage same by implementing the feedback using a high gain OPAMP. This paper also shows the new design of the simple high gam self-biased rail-to-rail OPAMP using a proposed self-biased super MOS composite circuit. The gain of designed OPAMP is measured over 100dB with $0.2{\sim}1.6V$ wide range CMR in single stage. Finally, the proposed process detection circuit is applied to a differential VCO and the VCO showed that the proposed process detection circuit compensates the process corners successfully and ensures the wide rage operation.

• Journal of IKEEE
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• v.27 no.1
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• pp.45-52
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• 2023

Cold-junction correction(CJC) and disconnection detection circuit design of various thermocouples(TC) and multi-channel TC interface circuit using them were designed. The CJC and disconnection detection circuit consists of a CJC semiconductor device, an instrumentation amplifier(IA), two resistors and a diode for disconnection detection. Based on the basic circuit, a multi-channel interface circuit was also implemented. The CJC was implemented using compensation semiconductor and IA, and disconnection detection was detected by using two resistor and a diode so that IA input voltage became -0.42V. As a result of the experiment using R-type TC, the error of the designed circuit was reduced from 0.14mV to 3㎶ after CJC in the temperature range of 0℃ to 1400℃. In addition, it was confirmed that the output voltage of IA was saturated from 88mV to -14.2V when TC was disconnected from normal. The output voltage of the designed circuit was 0V to 10V in the temperature range of 0℃ to 1400℃. The results of the 4-channel interface experiment using R-type TC were almost identical to the CJC and disconnection detection results for each channel. The implemented multi-channel interface has a feature that can be applied equally to E, J, K, T, R, and S-type TCs by changing the terminals of CJC semiconductor devices and adjusting the IA gain.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.2 s.314
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• pp.1-11
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• 2007

H.264/AVC uses variable block sizes to achieve significant coding gain. It has 7 different coding modes having different motion compensation block sizes in Inter slice, and 2 different intra prediction modes in Intra slice. This fine-tuned new coding feature has achieved far more significant coding gain compared with previous video coding standards. However, extremely high computational complexity is required when rate-distortion optimization (RDO) algorithm is used. This computational complexity is a major problem in implementing real-time H.264/AVC encoder on computationally constrained devices. Therefore, there is a clear need for complexity reduction algorithm of H.264/AVC such as fast mode decision. In this paper, we propose a fast mode decision with early $P8\times8$ mode rejection based on block size activity using large block history map (LBHM). Simulation results show that without any meaningful degradation, the proposed method reduces whole encoding time on average by 53%. Also the hybrid usage of the proposed method and the early SKIP mode decision in H.264/AVC reference model reduces whole encoding time by 63% on average.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.41 no.6
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• pp.209-220
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• 2004

The main feature of H.264 standard against conventional video standards is the high coding efficiency and the network friendliness. In spite of these outstanding features, it is not easy to implement H.264 codec as a real-time system due to its high requirement of memory bandwidth and intensive computation. Although the variable block size motion compensation using multiple reference frames is one of the key coding tools to bring about its main performance gain, it demands substantial computational complexity due to SAD (Sum of Absolute Difference) calculation among all possible combinations of coding modes to find the best motion vector. For speedup of motion estimation process, therefore, this paper proposes fast algorithms for both integer-pel and fractional-pel motion search. Since many conventional fast integer-pel motion estimation algorithms are not suitable for H.264 having variable motion block sizes, we propose the motion field adaptive search using the hierarchical block structure based on the diamond search applicable to variable motion block sizes. Besides, we also propose fast fractional-pel motion search using small diamond search centered by predictive motion vector based on statistical characteristic of motion vector.