• Proceedings of the KIPE Conference
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• 2005.07a
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• pp.701-703
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• 2005

Recently, There has been growing interest in Distributed Generations with high-energy efficiency due to the Increasing energy consumption and environmental pollution problems. but an insertion of Distributed Generations to existing power distribution system can cause several problems such as voltage variations, harmonics, protective coordination, increasing fault current etc, because of reverse power. This paper was applied to Sukumar M[l] proposal schemes and identity the faulted section performing short-circuit analysis by MATLAB program to distribution systems interconnected a large number of distributed generations.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.4
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• pp.951-956
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• 2011

Coronary angiography technology is usually used for examining or treating coronary artery stenosis. Especially, when a cardiologist inserts catheter into the heart blood vessel, the catheter path detection system is needed because the cardiologist has difficulty in not damaging vessel. Recently, to reduce this difficulty, many searchers have been working for the various image processing technologies, such as vessel edge detection, optimal threshold method, etc. However the results of these searches are showing different performances depend on the contrast and quality of images. Therefore, this study for the coronary angiography suggests a novel algorithm to avoid these problems. The suggested algorithm consists of multi-sampling, interpolation, threshold method, and fault points elimination. To evaluate the performance of the proposed method, we used several angiographic images in experimentation, and we found that the proposed method is effective for detecting the catheter insertion path.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.2
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• pp.99-107
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• 2003

This paper proposes a design for testability (DFT) and testability analysis method for register-transfer level (RTL) circuits. The proposed method executes testability analysis - controllability and observability - on the RTL circuit and determines the insertion points to enhance the testability. Then with the associated priority based on the testability, we insert only a few of the test multiplexers resulting in minimized area overhead. Experimental results shows a higher fault coverage and a shorter test generation time than the scan method. Also, the proposed method takes a shorter test application time required.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.11
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• pp.2869-2885
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• 1996

There werer many researches on the switch system for high speed netowrk such as B-ISDN and the server system for the multimedia services respectively. But, in case of simple connection of these two systems, we have to suffer the bottlenck problem of data transmission, and pay the wasteful expenditure because of duplicated architecture of both systems such as interconnecting network at the switch and the server. Therefore, we propse the unified architecture of switehces and servers, which can be used as switches and servers simultaneously. This is based on the hybercube structure. The links are used iterconnection network of switch system, and each node has the subscriber subsystem and the server subsystem. The proposed architecure has the benifits as follows; the easy espansion of capacity due to the scalability,the simple system development and maintenance because of the equivalance of each nodes, the high reliability against the fault of nodes and links due to the existence of the many alternative links between nodes, the easy flow and QoS managment due to the non-blocking data transmission between any two nodes, the flexible adaptation for additional new services owing to simple insertion server board to node. In this paper, we present overal configuration and node component of proposed architecture, and the procesing flow for the various services.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.59 no.5
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• pp.847-853
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• 2010

This paper describes switching surge analysis for reclosing decision in 345kV combined transmission line with XLPE power cable. Reclosing operation should be decided based on the detailed technical analysis in combined transmission line because this line includes power cable section which is week on insulation. Insulation of power cable can be breakdown at the week point in case of reclosing moment. Therefore the detailed analysis has to be carried out by considering several conditions such as length ratio of power cable section, arrestor, inserting resistance, charging rate, grounding resistance, etc.. On the other hand sheath voltage on IJ(Insulated Joint) is analyzed to check dangerous condition on cable cover. Analysis is performed by EMTP/ATP. Analysis results show that reclosing can be operated as the single line-to-ground fault occurs on overhead line in 345kV combined transmission line, if the inserting resistance is considered before the operation of main circuit breaker.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.1
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• pp.396-413
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• 2017

Dynamically checking the integrity of software at run-time is always a hot and difficult spot for trusted computing. Control-flow integrity is a basic and important safety property of software integrity. Many classic and emerging security attacks who introduce illegal control-flow to applications can cause unpredictable behaviors of computer-based systems. In this paper, we present a software-based approach to checking violation of control flow integrity at run-time. This paper proposes a high-performance and low-overhead software control flow checking solution, control flow checking at virtual edges (CFCVE). CFCVE assigns a unique signature to each basic block and then inserts a virtual vertex into each edge at compile time. This together with insertion of signature updating instructions and checking instructions into corresponding vertexes and virtual vertexes. Control flow faults can be detected by comparing the run-time signature with the saved one at compile time. Our experimental results show that CFCVE incurs only 10.61% performance overhead on average for several C benchmark programs and the average undetected error rate is only 9.29%. Compared with previous techniques, CFCVE has the characteristics of both high fault coverage and low memory and performance overhead.

• Journal of the Korean Society of Radiology
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• v.9 no.7
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• pp.467-471
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• 2015

This study's purpose is improve image quality to keep accurate tube angle in order to recognize distortion degree conditions by patient's position or tube angle and to provide exact clinical informations when taking chest AP projection for patient which have L-tube in stomach. The experimental equipment was ELMO-T6S by SHIMADZU corporation, then we put L-tube which attached 1 mm gap scales ruler on chest phantom surface. The experiment set by 90 kVp, 4 mAs, 120 cm distance. Each phantom position which changed supine, 30degree, 45degree, 60degree on the table exposured direct, ${\pm}5degree$, ${\pm}10degree$, ${\pm}15degree$ to head and feet directions. As a result, L-tube tip's position was changed by patient's position and tube angle. When patient's position is supine, tip's position change was lower than 30degree, 45degree, 60degree. We have to adjust patient's position or tube angle in order to occur image distortion by fault tube angle when confirming correct position L-tube tip through chest x-ray. Also, Radiological technologist try to make accurate evaluation index for satisfied L-tube insertion.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.8
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• pp.86-96
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• 2000

The representative area among the ones whose cost increases as the integration ratio increases is the test area. As the relative cost of hardware decreases, the BIST method has been focued on as the future-oriented test method. The biggest drawback of it is the increasing test time to obtain the acceptable fault coverage. This paper proposed a BIST implementation method to reduce the test times. This method uses an input grouping and test point insertion method, in which the definition of test point is different from the previous one. That is, the test points are defined on the basis of the internal nodes which are the reference points of the input grouping and are merging points of the grouped signals. The main algorithms in the proposed method were implemented with C-language, and various circuits were used to apply the proposed method for experiment. The results showed that the test time could be reduced to at most $1/2^{40}$ of the pseudo-random pattern case and the fault coverage were also increased compared with the conventional BIST method. The relative hardware overhead of the proposed method to the circuit under test decreases as th e size of the circuit to be tested increases, and the delay overhead by the BIST utility is negligible compared to that of the original circuit. That means, the proposed method can be applied efficiently to large VLSI circuits.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.9
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• pp.144-150
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• 2020

This study examined the current status of ATE in the development stage of the domestic guided weapons field, including the re-establishment of automatic test equipment (ATE), and attempted to develop methods to verify the validity of ATE in the defense sector. This study includes methods for confirming the repeatability and reproducibility of newly manufactured or replaced ATE. An error injection test is required for validation in the development phase. And pre-inspection steps are required for validation. When developing ATE, the use of an international standard testing script language ensures efficient validation and SW reliability. This ensures interoperability between the main and test equipment, and the tester can secure a test system platform that supports standardized testing methods, which is considered to be effective in validating specific ATE for each weapon system.

• Journal of IKEEE
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• v.26 no.2
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• pp.257-264
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• 2022

As it takes a lot of time and money to develop an aircraft, an environment for renovating and using existing operating aircraft has been created. As a result, many old aircraft were renovated, and due to the aging of the aircraft, more demanding cable requirements were required for renovation projects, and as the number of equipment inside the aircraft gradually increased, the difficulty of system integration increased. In order to solve the difficulties of system integration through systematization of verification procedures, this paper explains VSWR, I-loss, which are the main indicators of antenna cable modification, and explains DTF, one of the problem detection methods. It also explains the elements required for cable design, the environment to be measured, and procedures, and introduces the overall process and effect of antenna cable improvement through demonstration cases.