• 한국초전도학회:학술대회논문집
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• v.14
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• pp.67-67
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• 2004

• Progress in Superconductivity and Cryogenics
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• v.5 no.1
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• pp.56-59
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• 2003

As electric power systems grow to supply the increasing electric power demand short-circuit current tends to increase and impose a severe burden on circuit breakers and power system apparatuses. Thus, all electric equipment in a power system has to he designed to withstand the mechanical and thermal stresses of potential short-circuit currents. Among current limiting devices, Fault Current Limiter (FCL) is expected to reduce the short-circuit current. Especially, Superconducting Fault Current Limiters (SFCL) offer ideal performance: in normal operation the SFCL is in its superconducting state and has negligible impedance, in the event of a fault, the transition into the normal conducting state passively limits the current. The SFCL using high-temperature superconductors offers a positive resolution to controlling fault-current levels on utility distribution and transmission networks. This study contributes to the EMTDC based modeling and simulation method of DC Reactor type SFCL. Single and three phase faults in the utility system with DC reactor type SFCLs have been simulated using EMTDC in order to coordinate with other equipments, and the results are discussed in detail.

• Superconductivity and Cryogenics
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• v.5 no.1
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• pp.10-17
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• 2003

For limitation and interruption of short circuit currents from low voltage to extra high voltage applications, the electrical equipment including fuses and circuit breakers, are widely used today. But in order to anticipate increasing needs for effective and competitive device for limiting the growing fault current in electrical power systems, fault current limitation technologies and fault current limitation devices are widely introduced and investigated in these days. Furthermore, the applications of high temperature superconducting materials (HTSC) into the current limiting devices are new approach for developing of novel and effective col-rent limitation electrical equipment. In this research, the necessities of current limitation technology and the developed and developing current limitation devices for power systems are introduced. Finally, the investigation of resistive type fault current limiters which is under development by LG and KEPCO were introduced.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.9
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• pp.584-589
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• 2000

We fabricated resistive superconducting fault current limiters (SFCL) based on YBCO thin films grown on a 2-inch diameter Al2O3 substrate. The current limiting element was 1 mm wide and 260mm long meander line prepared by standard photolithography. The minimum quench current of the current limiting element was about 8 Apeak. This SFCL sucessfully controlled the fault current below 14.3 Apeak at the voltage of 100 Apeak which is otherwise to increase up to 141 Apeak. The quench completion time was less than 3 msec. The temperature of the current limiting element rose to about 200 K in 3 cycles after fault. The SFCL showed reproducible quench during hundreds times of repeated experiments.

• Progress in Superconductivity and Cryogenics
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• v.14 no.4
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• pp.36-40
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• 2012

This paper presents an experimental and numerical study on current limiting characteristics of a fault current controller (FCC). The FCC consists of an AC/DC power converter, a superconducting coil, and a control unit. Even though some previous researches proved that the FCC could adjust the fault current level, the current limiting characteristics by the superconducting coil should be investigated for design of the coil. In this paper, four kinds of model coils were tested; 1) air core, 2) iron core without any bias, 3) reversely magnetized core (RMC) using permanent magnets, and 4) RMC using an electromagnet. Based on a comparative study, it is confirmed that a RMC by an electromagnet (EM) could increase the effective inductance of the coil. In this paper, a numerical code to simulate the HTS coil with RMC was developed. This code can be applied to design the HTS coil with active reversely magnetized bias coil.

• Journal of Electrical Engineering and Technology
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• v.1 no.3
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• pp.279-286
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• 2006

A method for estimating the instantaneous phasor of a fault current signal is proposed for high-speed distance protection that is immune to a DC-offset. The method uses a modified notch filter in order to eliminate the power frequency component from the fault current signal. Since the output of the modified notch filter is the delayed DC-offset, delay compensation results in the same waveform as the original DC-offset. Subtracting the obtained DC-offset from the fault current signal yields a sinusoidal waveform, which becomes the real part of the instantaneous phasor. The imaginary part of the instantaneous phasor is based on the first difference of the fault current signal. Since a DC-offset also appears in the first difference, the DC-offset is removed trom the first difference using the results of the delay compensation. The performance of the proposed method was evaluated for a-phase to ground faults on a 345kV 100km overhead transmission line. The Electromagnetic Transient Program was utilized to generate fault current signals for different fault locations and fault inception angles. The performance evaluation showed that the proposed method can estimate the instantaneous phasor of a fault current signal with high speed and high accuracy.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.25 no.2
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• pp.137-142
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• 2011

In this paper, the fault current limiting and the hysteresys characteristics of a superconducting fault current limiter (SFCL) using magnetic coupling of two coils on the iron core with an air-gap were analyzed. The introduction of the air-gap in the SFCL with magnetically coupled two coils can suppress the saturation of the iron-core and, on the other hand, make the limiting impedance of the SFCL decreased, which results from the increase of the exciting current. To analyze the effect of the aig-gap on the fault current limiting characteristics of the SFCL, the hysteresys curves of the iron core comprising the SFCL were derived from the short-circuit experiment and the variation in the voltage-current trace of the SFCL during the fault period was analyzed. Through the comparison with the current limiting characteristics of the SFCL without air-gap, the air-gap could be confirmed to contribute to the suppression of the iron core's saturation through the increase of the SFCL's burden from the short-circuit current.

• Journal of Electrical Engineering and Technology
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• v.7 no.5
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• pp.659-663
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• 2012

The application of large power transformer into a power distribution system was inevitable due to the increase of power demand and distributed generation. However, the decrease of the power transformer's impedance caused the short-circuit current of the power distribution system to be increase thus, the higher short-circuit current exceeded the cut-off ratings of the protective devices such as circuit breaker. To solve these problems, several countermeasures have been proposed to protect the power system effectively from higher fault current and the superconducting fault current limiter (SFCL) has been expected to be the promising countermeasure. In spite of excellent current limiting performances of the SFCL, on the other hand, the efforts to apply the SFCL into power system has been delayed due to both the limited spaces for the SFCL's installation and its long recovery time after the fault removal. In order to solve these problems, a hybrid SFCL, which can perform either first half cycle limiting of first half cycle non-limiting operation, has been developed by corporation of LSIS (LS Industrial System) and KEPCO (Korea Electric Power Corporation). In this paper, we tried to requirements hybrid SFCL by PSCAD/EMTDC. Simulation results of our analysis of the hybrid SFCL is that its accompanied the characteristics both the limit the fault current and quick recovery caused by the less impact from superconductor.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.2
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• pp.173-183
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• 1996

In this paper, a new structure that can do fault detection and location of digial logic circuits more efficiently using current testing techniques is proposed. In the conventional method, observation point for steady state power supply current was only one, but in the proposed method more fault classes are divided for fault detection and location through the ovservation of steady state power supply current at two points. Also, it is shown that this structure can be easily applied in detection of stuck-open fault which is not easy to do testing with conventional current testing techniques. In the presented mehtod, an extra trasnistor is used, and current path is made compulsorily in the CMOS circuits in which no current path can be established in steady state, then it can be known that stuck-open tault is in the MOS transistor on the considering current path, if this path disappears due to stuck-open fault. The validity and the effectiveness is shwon, thorugh the SPICE simulation of circuits with fault and the current path search experiment using current path search program based on transistor short model wirtten in C language on SUN sparc workstation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.371-371
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• 2009

For the application of superconducting wires to fault current limiting devices, it is required that they have a high rated voltage when a fault occurs. Stabilizer-free coated conductors, particularly, shows a good performance for the high rated voltage, which is beyond 0.6 V/cm. In this study, using the stabilizer-free coated conductors, we made fault current limiting devices and examined their characteristics. Fault current limiting devices were fabricated with a shape of the cylinder of a mono-filar coil winding. Stabilizer-free coated conductors were wound along the mono-filar coil line and the terminal parts between the wire and metal were soldered using In solder. Two kinds of devices were fabricated by a different method in the terminal joint, one was made by a soldering and the other was made by a soldering-free joint. Critical currents and resistance at the joint parts were measured. In addition, long-time current flowing tests were also carried out for the characterization of the fault current limiting devices.